16ec0c65bSUsama Arif /* 2*a02bb36cSBoyan Karatotev * Copyright (c) 2020-2024, Arm Limited and Contributors. All rights reserved. 36ec0c65bSUsama Arif * 46ec0c65bSUsama Arif * SPDX-License-Identifier: BSD-3-Clause 56ec0c65bSUsama Arif */ 66ec0c65bSUsama Arif 76ec0c65bSUsama Arif #include <plat/arm/common/plat_arm.h> 86ec0c65bSUsama Arif #include <plat/arm/css/common/css_pm.h> 9*a02bb36cSBoyan Karatotev #include <platform_def.h> 106ec0c65bSUsama Arif 116ec0c65bSUsama Arif /****************************************************************************** 126ec0c65bSUsama Arif * The power domain tree descriptor. 136ec0c65bSUsama Arif ******************************************************************************/ 146ec0c65bSUsama Arif const unsigned char tc_pd_tree_desc[] = { 156ec0c65bSUsama Arif PLAT_ARM_CLUSTER_COUNT, 166ec0c65bSUsama Arif PLAT_MAX_CPUS_PER_CLUSTER, 176ec0c65bSUsama Arif }; 186ec0c65bSUsama Arif 196ec0c65bSUsama Arif /******************************************************************************* 206ec0c65bSUsama Arif * This function returns the topology tree information. 216ec0c65bSUsama Arif ******************************************************************************/ 226ec0c65bSUsama Arif const unsigned char *plat_get_power_domain_tree_desc(void) 236ec0c65bSUsama Arif { 246ec0c65bSUsama Arif return tc_pd_tree_desc; 256ec0c65bSUsama Arif } 266ec0c65bSUsama Arif 276ec0c65bSUsama Arif /******************************************************************************* 286ec0c65bSUsama Arif * The array mapping platform core position (implemented by plat_my_core_pos()) 296ec0c65bSUsama Arif * to the SCMI power domain ID implemented by SCP. 306ec0c65bSUsama Arif ******************************************************************************/ 316ec0c65bSUsama Arif const uint32_t plat_css_core_pos_to_scmi_dmn_id_map[] = { 326ec0c65bSUsama Arif (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x0)), 336ec0c65bSUsama Arif (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x1)), 346ec0c65bSUsama Arif (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x2)), 356ec0c65bSUsama Arif (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x3)), 366ec0c65bSUsama Arif (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x4)), 376ec0c65bSUsama Arif (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x5)), 386ec0c65bSUsama Arif (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x6)), 396ec0c65bSUsama Arif (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x7)), 40*a02bb36cSBoyan Karatotev #if PLATFORM_CORE_COUNT == 14 41*a02bb36cSBoyan Karatotev (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x8)), 42*a02bb36cSBoyan Karatotev (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x9)), 43*a02bb36cSBoyan Karatotev (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0xA)), 44*a02bb36cSBoyan Karatotev (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0xB)), 45*a02bb36cSBoyan Karatotev (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0xC)), 46*a02bb36cSBoyan Karatotev (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0xD)), 47*a02bb36cSBoyan Karatotev #endif /* PLATFORM_CORE_COUNT == 14 */ 486ec0c65bSUsama Arif }; 496ec0c65bSUsama Arif 506ec0c65bSUsama Arif /******************************************************************************* 516ec0c65bSUsama Arif * This function returns the core count within the cluster corresponding to 526ec0c65bSUsama Arif * `mpidr`. 536ec0c65bSUsama Arif ******************************************************************************/ 546ec0c65bSUsama Arif unsigned int plat_arm_get_cluster_core_count(u_register_t mpidr) 556ec0c65bSUsama Arif { 566ec0c65bSUsama Arif return PLAT_MAX_CPUS_PER_CLUSTER; 576ec0c65bSUsama Arif } 586ec0c65bSUsama Arif 596ec0c65bSUsama Arif #if ARM_PLAT_MT 606ec0c65bSUsama Arif /****************************************************************************** 616ec0c65bSUsama Arif * Return the number of PE's supported by the CPU. 626ec0c65bSUsama Arif *****************************************************************************/ 636ec0c65bSUsama Arif unsigned int plat_arm_get_cpu_pe_count(u_register_t mpidr) 646ec0c65bSUsama Arif { 656ec0c65bSUsama Arif return PLAT_MAX_PE_PER_CPU; 666ec0c65bSUsama Arif } 676ec0c65bSUsama Arif #endif 68