xref: /rk3399_ARM-atf/plat/arm/board/tc/tc_rng_trap.c (revision 2ae197acd6a91a96619090e503521d44bee494b2)
1*2ae197acSLeo Yan /*
2*2ae197acSLeo Yan  * Copyright (c) 2025, ARM Limited and Contributors. All rights reserved.
3*2ae197acSLeo Yan  *
4*2ae197acSLeo Yan  * SPDX-License-Identifier: BSD-3-Clause
5*2ae197acSLeo Yan  */
6*2ae197acSLeo Yan 
7*2ae197acSLeo Yan #include <assert.h>
8*2ae197acSLeo Yan 
9*2ae197acSLeo Yan #include <bl31/sync_handle.h>
10*2ae197acSLeo Yan #include <context.h>
11*2ae197acSLeo Yan #include <plat/common/plat_trng.h>
12*2ae197acSLeo Yan 
13*2ae197acSLeo Yan #define XZR_REG_NUM   31
14*2ae197acSLeo Yan 
15*2ae197acSLeo Yan 
16*2ae197acSLeo Yan int plat_handle_rng_trap(uint64_t esr_el3, cpu_context_t *ctx)
17*2ae197acSLeo Yan {
18*2ae197acSLeo Yan 	uint64_t entropy;
19*2ae197acSLeo Yan 
20*2ae197acSLeo Yan 	/* extract the target register number from the exception syndrome */
21*2ae197acSLeo Yan 	unsigned int rt = get_sysreg_iss_rt(esr_el3);
22*2ae197acSLeo Yan 
23*2ae197acSLeo Yan 	/* ignore XZR accesses and writes to the register */
24*2ae197acSLeo Yan 	assert(rt != XZR_REG_NUM && !is_sysreg_iss_write(esr_el3));
25*2ae197acSLeo Yan 
26*2ae197acSLeo Yan 	if (!plat_get_entropy(&entropy)) {
27*2ae197acSLeo Yan 		ERROR("Failed to get entropy\n");
28*2ae197acSLeo Yan 		panic();
29*2ae197acSLeo Yan 	}
30*2ae197acSLeo Yan 
31*2ae197acSLeo Yan 	/* Emulate RNDR and RNDRRS */
32*2ae197acSLeo Yan 	gp_regs_t *gpregs = get_gpregs_ctx(ctx);
33*2ae197acSLeo Yan 
34*2ae197acSLeo Yan 	write_ctx_reg(gpregs, rt, entropy);
35*2ae197acSLeo Yan 
36*2ae197acSLeo Yan 	/*
37*2ae197acSLeo Yan 	 * We successfully handled the trap, continue with the next
38*2ae197acSLeo Yan 	 * instruction.
39*2ae197acSLeo Yan 	 */
40*2ae197acSLeo Yan 	return TRAP_RET_CONTINUE;
41*2ae197acSLeo Yan }
42