1 /* 2 * Copyright (c) 2020-2023, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 9 #include <libfdt.h> 10 #include <tc_plat.h> 11 12 #include <common/bl_common.h> 13 #include <common/debug.h> 14 #include <drivers/arm/css/css_mhu_doorbell.h> 15 #include <drivers/arm/css/scmi.h> 16 #include <drivers/arm/sbsa.h> 17 #include <lib/fconf/fconf.h> 18 #include <lib/fconf/fconf_dyn_cfg_getter.h> 19 #include <plat/arm/common/plat_arm.h> 20 #include <plat/common/platform.h> 21 22 static scmi_channel_plat_info_t tc_scmi_plat_info[] = { 23 { 24 .scmi_mbx_mem = CSS_SCMI_PAYLOAD_BASE, 25 .db_reg_addr = PLAT_CSS_MHU_BASE + SENDER_REG_SET(0), 26 .db_preserve_mask = 0xfffffffe, 27 .db_modify_mask = 0x1, 28 .ring_doorbell = &mhuv2_ring_doorbell, 29 } 30 }; 31 32 void bl31_platform_setup(void) 33 { 34 tc_bl31_common_platform_setup(); 35 } 36 37 scmi_channel_plat_info_t *plat_css_get_scmi_info(unsigned int channel_id) 38 { 39 40 return &tc_scmi_plat_info[channel_id]; 41 42 } 43 44 void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, 45 u_register_t arg2, u_register_t arg3) 46 { 47 arm_bl31_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3); 48 49 /* Fill the properties struct with the info from the config dtb */ 50 fconf_populate("FW_CONFIG", arg1); 51 } 52 53 #ifdef PLATFORM_TESTS 54 static __dead2 void tc_run_platform_tests(void) 55 { 56 int tests_failed; 57 58 printf("\nStarting platform tests...\n"); 59 60 #ifdef PLATFORM_TEST_NV_COUNTERS 61 tests_failed = nv_counter_test(); 62 #elif PLATFORM_TEST_TFM_TESTSUITE 63 tests_failed = run_platform_tests(); 64 #endif 65 66 printf("Platform tests %s.\n", 67 (tests_failed != 0) ? "failed" : "succeeded"); 68 69 /* Suspend booting, no matter the tests outcome. */ 70 printf("Suspend booting...\n"); 71 plat_error_handler(-1); 72 } 73 #endif 74 75 void tc_bl31_common_platform_setup(void) 76 { 77 arm_bl31_platform_setup(); 78 79 #ifdef PLATFORM_TESTS 80 tc_run_platform_tests(); 81 #endif 82 } 83 84 const plat_psci_ops_t *plat_arm_psci_override_pm_ops(plat_psci_ops_t *ops) 85 { 86 return css_scmi_override_pm_ops(ops); 87 } 88 89 void __init bl31_plat_arch_setup(void) 90 { 91 arm_bl31_plat_arch_setup(); 92 93 /* HW_CONFIG was also loaded by BL2 */ 94 const struct dyn_cfg_dtb_info_t *hw_config_info; 95 96 hw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, HW_CONFIG_ID); 97 assert(hw_config_info != NULL); 98 99 fconf_populate("HW_CONFIG", hw_config_info->config_addr); 100 } 101 102 #if defined(SPD_spmd) && (SPMC_AT_EL3 == 0) 103 void tc_bl31_plat_runtime_setup(void) 104 { 105 arm_bl31_plat_runtime_setup(); 106 107 /* Start secure watchdog timer. */ 108 plat_arm_secure_wdt_start(); 109 } 110 111 void bl31_plat_runtime_setup(void) 112 { 113 tc_bl31_plat_runtime_setup(); 114 } 115 116 /* 117 * Platform handler for Group0 secure interrupt. 118 */ 119 int plat_spmd_handle_group0_interrupt(uint32_t intid) 120 { 121 /* Trusted Watchdog timer is the only source of Group0 interrupt now. */ 122 if (intid == SBSA_SECURE_WDOG_INTID) { 123 INFO("Watchdog restarted\n"); 124 /* Refresh the timer. */ 125 plat_arm_secure_wdt_refresh(); 126 127 /* Deactivate the corresponding interrupt. */ 128 plat_ic_end_of_interrupt(intid); 129 return 0; 130 } 131 132 return -1; 133 } 134 #endif /*defined(SPD_spmd) && (SPMC_AT_EL3 == 0)*/ 135