1# Copyright (c) 2021-2025, Arm Limited. All rights reserved. 2# 3# SPDX-License-Identifier: BSD-3-Clause 4# 5 6include common/fdt_wrappers.mk 7 8TARGET_FLAVOUR := fvp 9# DPU with SCMI may not necessarily work, so allow its independence 10TC_DPU_USE_SCMI_CLK := 1 11# SCMI power domain control enable 12TC_SCMI_PD_CTRL_EN := 1 13 14# System setup 15CSS_USE_SCMI_SDS_DRIVER := 1 16HW_ASSISTED_COHERENCY := 1 17USE_COHERENT_MEM := 0 18GIC_ENABLE_V4_EXTN := 1 19GICV3_SUPPORT_GIC600 := 1 20override NEED_BL2U := no 21override ARM_PLAT_MT := 1 22 23# CPU setup 24ARM_ARCH_MINOR := 7 25BRANCH_PROTECTION := 1 26ENABLE_FEAT_MPAM := 1 # default is 2, optimise 27ENABLE_SVE_FOR_NS := 2 # to show we use it 28ENABLE_SVE_FOR_SWD := 1 29ENABLE_SME_FOR_NS := 2 30ENABLE_SME2_FOR_NS := 2 31ENABLE_SME_FOR_SWD := 1 32ENABLE_TRBE_FOR_NS := 1 33ENABLE_SYS_REG_TRACE_FOR_NS := 1 34ENABLE_FEAT_AMU := 1 35ENABLE_AMU_AUXILIARY_COUNTERS := 1 36ENABLE_MPMM := 1 37ENABLE_FEAT_MTE2 := 2 38ENABLE_SPE_FOR_NS := 2 39ENABLE_FEAT_TCR2 := 2 40 41ifneq ($(filter ${TARGET_PLATFORM}, 3),) 42ENABLE_FEAT_RNG_TRAP := 0 43else 44ENABLE_FEAT_RNG_TRAP := 1 45endif 46 47CTX_INCLUDE_AARCH32_REGS := 0 48 49ifeq (${SPD},spmd) 50 SPMD_SPM_AT_SEL2 := 1 51 CTX_INCLUDE_PAUTH_REGS := 1 52endif 53 54TRNG_SUPPORT := 1 55 56# TC RESOLUTION - LIST OF VALID OPTIONS (this impacts only FVP) 57TC_RESOLUTION_OPTIONS := 640x480p60 \ 58 1920x1080p60 59# Set default to the 640x480p60 resolution mode 60TC_RESOLUTION ?= $(firstword $(TC_RESOLUTION_OPTIONS)) 61 62# Check resolution option for FVP 63ifneq ($(filter ${TARGET_FLAVOUR}, fvp),) 64ifeq ($(filter ${TC_RESOLUTION}, ${TC_RESOLUTION_OPTIONS}),) 65 $(error TC_RESOLUTION is ${TC_RESOLUTION}, it must be: ${TC_RESOLUTION_OPTIONS}) 66endif 67endif 68 69ifneq ($(shell expr $(TARGET_PLATFORM) \<= 2), 0) 70 $(error Platform ${PLAT}$(TARGET_PLATFORM) is no longer available.) 71endif 72 73ifeq ($(shell expr $(TARGET_PLATFORM) \<= 4), 0) 74 $(error TARGET_PLATFORM must be less than or equal to 4) 75endif 76 77ifeq ($(filter ${TARGET_FLAVOUR}, fvp fpga),) 78 $(error TARGET_FLAVOUR must be fvp or fpga) 79endif 80 81# Support for loading FS Image to DRAM 82TC_FPGA_FS_IMG_IN_RAM := 0 83 84# Support Loading of FIP image to DRAM 85TC_FPGA_FIP_IMG_IN_RAM := 0 86 87# Use simple panel instead of vencoder with DPU 88TC_DPU_USE_SIMPLE_PANEL := 0 89 90$(eval $(call add_defines, \ 91 TARGET_PLATFORM \ 92 TARGET_FLAVOUR_$(call uppercase,${TARGET_FLAVOUR}) \ 93 TC_RESOLUTION_$(call uppercase,${TC_RESOLUTION}) \ 94 TC_DPU_USE_SCMI_CLK \ 95 TC_SCMI_PD_CTRL_EN \ 96 TC_FPGA_FS_IMG_IN_RAM \ 97 TC_FPGA_FIP_IMG_IN_RAM \ 98 TC_DPU_USE_SIMPLE_PANEL \ 99)) 100 101CSS_LOAD_SCP_IMAGES := 1 102 103# Save DSU PMU registers on cluster off and restore them on cluster on 104PRESERVE_DSU_PMU_REGS := 1 105 106PLAT_MHU := MHUv3 107 108# Include GICv3 driver files 109include drivers/arm/gic/v3/gicv3.mk 110 111ENT_GIC_SOURCES := ${GICV3_SOURCES} \ 112 plat/common/plat_gicv3.c \ 113 plat/arm/common/arm_gicv3.c 114 115TC_BASE = plat/arm/board/tc 116 117PLAT_INCLUDES += -I${TC_BASE}/include/ \ 118 -I${TC_BASE}/fdts/ 119 120# CPU libraries for TARGET_PLATFORM=3 121ifeq (${TARGET_PLATFORM}, 3) 122ERRATA_A520_2938996 := 1 123 124TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a520.S \ 125 lib/cpus/aarch64/cortex_a725.S \ 126 lib/cpus/aarch64/cortex_x925.S 127endif 128 129# CPU libraries for TARGET_PLATFORM=4 130ifeq (${TARGET_PLATFORM}, 4) 131FEAT_PABANDON := 1 132# prevent CME related wakups 133ERRATA_SME_POWER_DOWN := 1 134TC_CPU_SOURCES += lib/cpus/aarch64/cortex_gelas.S \ 135 lib/cpus/aarch64/nevis.S \ 136 lib/cpus/aarch64/travis.S 137endif 138 139INTERCONNECT_SOURCES := ${TC_BASE}/tc_interconnect.c \ 140 plat/arm/common/arm_ni.c 141 142PLAT_BL_COMMON_SOURCES += ${TC_BASE}/tc_plat.c \ 143 ${TC_BASE}/include/tc_helpers.S 144 145 146ifneq (${ENABLE_STACK_PROTECTOR},0) 147PLAT_BL_COMMON_SOURCES += ${TC_BASE}/tc_stack_protector.c 148endif 149 150BL1_SOURCES += ${INTERCONNECT_SOURCES} \ 151 ${TC_CPU_SOURCES} \ 152 ${TC_BASE}/tc_trusted_boot.c \ 153 ${TC_BASE}/tc_bl1_setup.c \ 154 ${TC_BASE}/tc_err.c \ 155 drivers/arm/sbsa/sbsa.c 156 157BL2_SOURCES += ${TC_BASE}/tc_security.c \ 158 ${TC_BASE}/tc_err.c \ 159 ${TC_BASE}/tc_trusted_boot.c \ 160 ${TC_BASE}/tc_bl2_setup.c \ 161 lib/utils/mem_region.c \ 162 drivers/arm/tzc/tzc400.c \ 163 plat/arm/common/arm_nor_psci_mem_protect.c 164 165BL31_SOURCES += ${INTERCONNECT_SOURCES} \ 166 ${TC_CPU_SOURCES} \ 167 ${ENT_GIC_SOURCES} \ 168 ${TC_BASE}/tc_bl31_setup.c \ 169 ${TC_BASE}/tc_topology.c \ 170 lib/fconf/fconf.c \ 171 lib/fconf/fconf_dyn_cfg_getter.c \ 172 drivers/arm/css/dsu/dsu.c \ 173 drivers/cfi/v2m/v2m_flash.c \ 174 lib/utils/mem_region.c \ 175 plat/arm/common/arm_nor_psci_mem_protect.c \ 176 drivers/arm/sbsa/sbsa.c 177 178BL31_SOURCES += ${FDT_WRAPPERS_SOURCES} 179 180# Add the FDT_SOURCES and options for Dynamic Config 181FDT_SOURCES += ${TC_BASE}/fdts/${PLAT}_fw_config.dts \ 182 ${TC_BASE}/fdts/${PLAT}_tb_fw_config.dts \ 183 ${TC_BASE}/fdts/${PLAT}_nt_fw_config.dts 184FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb 185TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb 186FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb 187 188# Add the FW_CONFIG to FIP and specify the same to certtool 189$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG})) 190# Add the TB_FW_CONFIG to FIP and specify the same to certtool 191$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG})) 192# Add the NT_FW_CONFIG to FIP and specify the same to certtool 193$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config,${FVP_NT_FW_CONFIG})) 194 195ifeq (${SPD},spmd) 196ifeq ($(ARM_SPMC_MANIFEST_DTS),) 197ARM_SPMC_MANIFEST_DTS := ${TC_BASE}/fdts/${PLAT}_spmc_test_manifest.dts 198endif 199 200FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS} 201TC_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_SPMC_MANIFEST_DTS})).dtb 202 203# Add the TOS_FW_CONFIG to FIP and specify the same to certtool 204$(eval $(call TOOL_ADD_PAYLOAD,${TC_TOS_FW_CONFIG},--tos-fw-config,${TC_TOS_FW_CONFIG})) 205endif 206 207#Device tree 208TC_HW_CONFIG_DTS := fdts/${PLAT}${TARGET_PLATFORM}.dts 209TC_HW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}.dtb 210FDT_SOURCES += ${TC_HW_CONFIG_DTS} 211$(eval TC_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(TC_HW_CONFIG_DTS))) 212 213# Add the HW_CONFIG to FIP and specify the same to certtool 214$(eval $(call TOOL_ADD_PAYLOAD,${TC_HW_CONFIG},--hw-config,${TC_HW_CONFIG})) 215 216$(info Including rse_comms.mk) 217include drivers/arm/rse/rse_comms.mk 218 219BL1_SOURCES += ${RSE_COMMS_SOURCES} \ 220 plat/arm/board/tc/tc_rse_comms.c 221BL2_SOURCES += ${RSE_COMMS_SOURCES} \ 222 plat/arm/board/tc/tc_rse_comms.c 223BL31_SOURCES += ${RSE_COMMS_SOURCES} \ 224 plat/arm/board/tc/tc_rse_comms.c \ 225 lib/psa/rse_platform.c 226 227# Include Measured Boot makefile before any Crypto library makefile. 228# Crypto library makefile may need default definitions of Measured Boot build 229# flags present in Measured Boot makefile. 230ifeq (${MEASURED_BOOT},1) 231 ifeq (${DICE_PROTECTION_ENVIRONMENT},1) 232 $(info Including qcbor.mk) 233 include drivers/measured_boot/rse/qcbor.mk 234 $(info Including dice_prot_env.mk) 235 include drivers/measured_boot/rse/dice_prot_env.mk 236 237 BL1_SOURCES += ${QCBOR_SOURCES} \ 238 ${DPE_SOURCES} \ 239 plat/arm/board/tc/tc_common_dpe.c \ 240 plat/arm/board/tc/tc_bl1_dpe.c \ 241 lib/psa/dice_protection_environment.c \ 242 drivers/arm/css/sds/sds.c \ 243 drivers/delay_timer/delay_timer.c \ 244 drivers/delay_timer/generic_delay_timer.c 245 246 BL2_SOURCES += ${QCBOR_SOURCES} \ 247 ${DPE_SOURCES} \ 248 plat/arm/board/tc/tc_common_dpe.c \ 249 plat/arm/board/tc/tc_bl2_dpe.c \ 250 lib/psa/dice_protection_environment.c 251 252 PLAT_INCLUDES += -I${QCBOR_INCLUDES} \ 253 -Iinclude/lib/dice 254 else 255 $(info Including rse_measured_boot.mk) 256 include drivers/measured_boot/rse/rse_measured_boot.mk 257 258 BL1_SOURCES += ${MEASURED_BOOT_SOURCES} \ 259 plat/arm/board/tc/tc_common_measured_boot.c \ 260 plat/arm/board/tc/tc_bl1_measured_boot.c \ 261 lib/psa/measured_boot.c 262 263 BL2_SOURCES += ${MEASURED_BOOT_SOURCES} \ 264 plat/arm/board/tc/tc_common_measured_boot.c \ 265 plat/arm/board/tc/tc_bl2_measured_boot.c \ 266 lib/psa/measured_boot.c 267 endif 268endif 269 270BL31_SOURCES += plat/arm/board/tc/tc_trng.c 271 272ifneq (${ENABLE_FEAT_RNG_TRAP},0) 273 BL31_SOURCES += plat/arm/board/tc/tc_rng_trap.c 274endif 275 276ifneq (${PLATFORM_TEST},) 277 # Add this include as first, before arm_common.mk. This is necessary 278 # because arm_common.mk builds Mbed TLS, and platform_test.mk can 279 # change the list of Mbed TLS files that are to be compiled 280 # (LIBMBEDTLS_SRCS). 281 include plat/arm/board/tc/platform_test.mk 282endif 283 284 285include plat/arm/common/arm_common.mk 286include plat/arm/css/common/css_common.mk 287include plat/arm/board/common/board_common.mk 288