1# Copyright (c) 2021-2025, Arm Limited. All rights reserved. 2# 3# SPDX-License-Identifier: BSD-3-Clause 4# 5 6include common/fdt_wrappers.mk 7 8# TARGET_PLATFORM must be defined as a pre-requisite 9$(eval $(call assert_numerics,TARGET_PLATFORM)) 10 11TARGET_FLAVOUR := fvp 12# DPU with SCMI may not necessarily work, so allow its independence 13TC_DPU_USE_SCMI_CLK := 1 14# SCMI power domain control enable 15TC_SCMI_PD_CTRL_EN := 1 16 17# System setup 18CSS_USE_SCMI_SDS_DRIVER := 1 19HW_ASSISTED_COHERENCY := 1 20USE_COHERENT_MEM := 0 21USE_GIC_DRIVER := 3 22USE_DSU_DRIVER := 1 23GIC_ENABLE_V4_EXTN := 1 24GICV3_SUPPORT_GIC600 := 1 25override NEED_BL2U := no 26override ARM_PLAT_MT := 1 27 28# CPU setup 29ARM_ARCH_MINOR := 7 30BRANCH_PROTECTION := 1 31ENABLE_FEAT_MPAM := 1 # default is 2, optimise 32ENABLE_SVE_FOR_NS := 2 # to show we use it 33ENABLE_SVE_FOR_SWD := 1 34ENABLE_SME_FOR_NS := 2 35ENABLE_SME2_FOR_NS := 2 36ENABLE_SME_FOR_SWD := 1 37ENABLE_TRBE_FOR_NS := 1 38ENABLE_SYS_REG_TRACE_FOR_NS := 1 39ENABLE_FEAT_AMU := 1 40ENABLE_FEAT_AMUv1p1 := 1 41ENABLE_AMU_AUXILIARY_COUNTERS := 1 42ENABLE_MPMM := 1 43ENABLE_FEAT_MTE2 := 2 44ENABLE_SPE_FOR_NS := 2 45ENABLE_FEAT_TCR2 := 2 46 47ifneq ($(filter ${TARGET_PLATFORM}, 3),) 48ENABLE_FEAT_RNG_TRAP := 0 49else 50ENABLE_FEAT_RNG_TRAP := 1 51endif 52 53CTX_INCLUDE_AARCH32_REGS := 0 54 55ifeq (${SPD},spmd) 56 SPMD_SPM_AT_SEL2 := 1 57 CTX_INCLUDE_PAUTH_REGS := 1 58endif 59 60TRNG_SUPPORT := 1 61 62# TC RESOLUTION - LIST OF VALID OPTIONS (this impacts only FVP) 63TC_RESOLUTION_OPTIONS := 640x480p60 \ 64 1920x1080p60 65# Set default to the 640x480p60 resolution mode 66TC_RESOLUTION ?= $(firstword $(TC_RESOLUTION_OPTIONS)) 67 68# Check resolution option for FVP 69ifneq ($(filter ${TARGET_FLAVOUR}, fvp),) 70ifeq ($(filter ${TC_RESOLUTION}, ${TC_RESOLUTION_OPTIONS}),) 71 $(error TC_RESOLUTION is ${TC_RESOLUTION}, it must be: ${TC_RESOLUTION_OPTIONS}) 72endif 73endif 74 75ifneq ($(shell expr $(TARGET_PLATFORM) \<= 2), 0) 76 $(error Platform ${PLAT}$(TARGET_PLATFORM) is no longer available.) 77endif 78 79ifeq ($(shell expr $(TARGET_PLATFORM) \<= 4), 0) 80 $(error TARGET_PLATFORM must be less than or equal to 4) 81endif 82 83ifeq ($(filter ${TARGET_FLAVOUR}, fvp fpga),) 84 $(error TARGET_FLAVOUR must be fvp or fpga) 85endif 86 87# Support for loading FS Image to DRAM 88TC_FPGA_FS_IMG_IN_RAM := 0 89 90# Support Loading of FIP image to DRAM 91TC_FPGA_FIP_IMG_IN_RAM := 0 92 93# Use simple panel instead of vencoder with DPU 94TC_DPU_USE_SIMPLE_PANEL := 0 95 96$(eval $(call add_defines, \ 97 TARGET_PLATFORM \ 98 TARGET_FLAVOUR_$(call uppercase,${TARGET_FLAVOUR}) \ 99 TC_RESOLUTION_$(call uppercase,${TC_RESOLUTION}) \ 100 TC_DPU_USE_SCMI_CLK \ 101 TC_SCMI_PD_CTRL_EN \ 102 TC_FPGA_FS_IMG_IN_RAM \ 103 TC_FPGA_FIP_IMG_IN_RAM \ 104 TC_DPU_USE_SIMPLE_PANEL \ 105)) 106 107CSS_LOAD_SCP_IMAGES := 1 108 109# Save DSU PMU registers on cluster off and restore them on cluster on 110PRESERVE_DSU_PMU_REGS := 1 111 112PLAT_MHU := MHUv3 113 114TC_BASE = plat/arm/board/tc 115 116PLAT_INCLUDES += -I${TC_BASE}/include/ \ 117 -I${TC_BASE}/fdts/ 118 119# CPU libraries for TARGET_PLATFORM=3 120ifeq (${TARGET_PLATFORM}, 3) 121ERRATA_A520_2938996 := 1 122 123TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a520.S \ 124 lib/cpus/aarch64/cortex_a725.S \ 125 lib/cpus/aarch64/cortex_x925.S 126endif 127 128# CPU libraries for TARGET_PLATFORM=4 129ifeq (${TARGET_PLATFORM}, 4) 130 131# prevent CME related wakups 132ERRATA_SME_POWER_DOWN := 1 133TC_CPU_SOURCES += lib/cpus/aarch64/c1_pro.S \ 134 lib/cpus/aarch64/c1_nano.S \ 135 lib/cpus/aarch64/c1_ultra.S 136endif 137 138INTERCONNECT_SOURCES := plat/arm/common/arm_ni.c 139 140PLAT_BL_COMMON_SOURCES += ${TC_BASE}/tc_plat.c \ 141 ${TC_BASE}/include/tc_helpers.S 142 143 144ifneq (${ENABLE_STACK_PROTECTOR},0) 145PLAT_BL_COMMON_SOURCES += ${TC_BASE}/tc_stack_protector.c 146endif 147 148BL1_SOURCES += ${INTERCONNECT_SOURCES} \ 149 ${TC_CPU_SOURCES} \ 150 ${TC_BASE}/tc_trusted_boot.c \ 151 ${TC_BASE}/tc_bl1_setup.c \ 152 ${TC_BASE}/tc_err.c \ 153 drivers/arm/sbsa/sbsa.c 154 155BL2_SOURCES += ${TC_BASE}/tc_security.c \ 156 ${TC_BASE}/tc_err.c \ 157 ${TC_BASE}/tc_trusted_boot.c \ 158 ${TC_BASE}/tc_bl2_setup.c \ 159 lib/utils/mem_region.c \ 160 drivers/arm/tzc/tzc400.c \ 161 plat/arm/common/arm_nor_psci_mem_protect.c 162 163BL31_SOURCES += ${INTERCONNECT_SOURCES} \ 164 ${TC_CPU_SOURCES} \ 165 ${TC_BASE}/tc_bl31_setup.c \ 166 ${TC_BASE}/tc_topology.c \ 167 lib/fconf/fconf.c \ 168 lib/fconf/fconf_dyn_cfg_getter.c \ 169 drivers/arm/dsu/dsu.c \ 170 drivers/cfi/v2m/v2m_flash.c \ 171 lib/utils/mem_region.c \ 172 plat/arm/common/arm_nor_psci_mem_protect.c \ 173 drivers/arm/sbsa/sbsa.c 174 175BL31_SOURCES += ${FDT_WRAPPERS_SOURCES} 176 177# Add the FDT_SOURCES and options for Dynamic Config 178FDT_SOURCES += ${TC_BASE}/fdts/${PLAT}_fw_config.dts \ 179 ${TC_BASE}/fdts/${PLAT}_tb_fw_config.dts \ 180 ${TC_BASE}/fdts/${PLAT}_nt_fw_config.dts 181FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb 182TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb 183FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb 184 185# Add the FW_CONFIG to FIP and specify the same to certtool 186$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG})) 187# Add the TB_FW_CONFIG to FIP and specify the same to certtool 188$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG})) 189# Add the NT_FW_CONFIG to FIP and specify the same to certtool 190$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config,${FVP_NT_FW_CONFIG})) 191 192ifeq (${SPD},spmd) 193ifeq ($(ARM_SPMC_MANIFEST_DTS),) 194ARM_SPMC_MANIFEST_DTS := ${TC_BASE}/fdts/${PLAT}_spmc_test_manifest.dts 195endif 196 197FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS} 198TC_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_SPMC_MANIFEST_DTS})).dtb 199 200# Add the TOS_FW_CONFIG to FIP and specify the same to certtool 201$(eval $(call TOOL_ADD_PAYLOAD,${TC_TOS_FW_CONFIG},--tos-fw-config,${TC_TOS_FW_CONFIG})) 202endif 203 204#Device tree 205TC_HW_CONFIG_DTS := fdts/${PLAT}${TARGET_PLATFORM}.dts 206TC_HW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}.dtb 207FDT_SOURCES += ${TC_HW_CONFIG_DTS} 208$(eval TC_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(TC_HW_CONFIG_DTS))) 209 210# Add the HW_CONFIG to FIP and specify the same to certtool 211$(eval $(call TOOL_ADD_PAYLOAD,${TC_HW_CONFIG},--hw-config,${TC_HW_CONFIG})) 212 213$(info Including rse_comms.mk) 214include drivers/arm/rse/rse_comms.mk 215 216BL1_SOURCES += ${RSE_COMMS_SOURCES} \ 217 plat/arm/board/tc/tc_rse_comms.c 218BL2_SOURCES += ${RSE_COMMS_SOURCES} \ 219 plat/arm/board/tc/tc_rse_comms.c 220BL31_SOURCES += ${RSE_COMMS_SOURCES} \ 221 plat/arm/board/tc/tc_rse_comms.c \ 222 lib/psa/rse_platform.c 223 224# Include Measured Boot makefile before any Crypto library makefile. 225# Crypto library makefile may need default definitions of Measured Boot build 226# flags present in Measured Boot makefile. 227ifeq (${MEASURED_BOOT},1) 228 ifeq (${DICE_PROTECTION_ENVIRONMENT},1) 229 $(info Including qcbor.mk) 230 include drivers/measured_boot/rse/qcbor.mk 231 $(info Including dice_prot_env.mk) 232 include drivers/measured_boot/rse/dice_prot_env.mk 233 234 BL1_SOURCES += ${QCBOR_SOURCES} \ 235 ${DPE_SOURCES} \ 236 plat/arm/board/tc/tc_common_dpe.c \ 237 plat/arm/board/tc/tc_bl1_dpe.c \ 238 lib/psa/dice_protection_environment.c \ 239 drivers/arm/css/sds/sds.c \ 240 drivers/delay_timer/delay_timer.c \ 241 drivers/delay_timer/generic_delay_timer.c 242 243 BL2_SOURCES += ${QCBOR_SOURCES} \ 244 ${DPE_SOURCES} \ 245 plat/arm/board/tc/tc_common_dpe.c \ 246 plat/arm/board/tc/tc_bl2_dpe.c \ 247 lib/psa/dice_protection_environment.c 248 249 PLAT_INCLUDES += -I${QCBOR_INCLUDES} \ 250 -Iinclude/lib/dice 251 else 252 $(info Including rse_measured_boot.mk) 253 include drivers/measured_boot/rse/rse_measured_boot.mk 254 255 BL1_SOURCES += ${MEASURED_BOOT_SOURCES} \ 256 plat/arm/board/tc/tc_common_measured_boot.c \ 257 plat/arm/board/tc/tc_bl1_measured_boot.c \ 258 lib/psa/measured_boot.c 259 260 BL2_SOURCES += ${MEASURED_BOOT_SOURCES} \ 261 plat/arm/board/tc/tc_common_measured_boot.c \ 262 plat/arm/board/tc/tc_bl2_measured_boot.c \ 263 lib/psa/measured_boot.c 264 endif 265endif 266 267BL31_SOURCES += plat/arm/board/tc/tc_trng.c 268 269ifneq (${ENABLE_FEAT_RNG_TRAP},0) 270 BL31_SOURCES += plat/arm/board/tc/tc_rng_trap.c 271endif 272 273ifneq (${PLATFORM_TEST},) 274 # Add this include as first, before arm_common.mk. This is necessary 275 # because arm_common.mk builds Mbed TLS, and platform_test.mk can 276 # change the list of Mbed TLS files that are to be compiled 277 # (LIBMBEDTLS_SRCS). 278 include plat/arm/board/tc/platform_test.mk 279endif 280 281 282include plat/arm/common/arm_common.mk 283include plat/arm/css/common/css_common.mk 284include plat/arm/board/common/board_common.mk 285