1# Copyright (c) 2021-2025, Arm Limited. All rights reserved. 2# 3# SPDX-License-Identifier: BSD-3-Clause 4# 5 6include common/fdt_wrappers.mk 7 8TARGET_FLAVOUR := fvp 9# DPU with SCMI may not necessarily work, so allow its independence 10TC_DPU_USE_SCMI_CLK := 1 11# SCMI power domain control enable 12TC_SCMI_PD_CTRL_EN := 1 13 14# System setup 15CSS_USE_SCMI_SDS_DRIVER := 1 16HW_ASSISTED_COHERENCY := 1 17USE_COHERENT_MEM := 0 18GIC_ENABLE_V4_EXTN := 1 19GICV3_SUPPORT_GIC600 := 1 20override NEED_BL2U := no 21override ARM_PLAT_MT := 1 22 23# CPU setup 24ARM_ARCH_MINOR := 7 25BRANCH_PROTECTION := 1 26ENABLE_FEAT_MPAM := 1 # default is 2, optimise 27ENABLE_SVE_FOR_NS := 2 # to show we use it 28ENABLE_SVE_FOR_SWD := 1 29ENABLE_SME_FOR_NS := 2 30ENABLE_SME2_FOR_NS := 2 31ENABLE_SME_FOR_SWD := 1 32ENABLE_TRBE_FOR_NS := 1 33ENABLE_SYS_REG_TRACE_FOR_NS := 1 34ENABLE_FEAT_AMU := 1 35ENABLE_AMU_FCONF := 1 36ENABLE_AMU_AUXILIARY_COUNTERS := 1 37ENABLE_MPMM := 1 38ENABLE_MPMM_FCONF := 1 39ENABLE_FEAT_MTE2 := 2 40ENABLE_SPE_FOR_NS := 3 41ENABLE_FEAT_TCR2 := 3 42 43ifneq ($(filter ${TARGET_PLATFORM}, 3),) 44ENABLE_FEAT_RNG_TRAP := 0 45else 46ENABLE_FEAT_RNG_TRAP := 1 47endif 48 49CTX_INCLUDE_AARCH32_REGS := 0 50 51ifeq (${SPD},spmd) 52 SPMD_SPM_AT_SEL2 := 1 53 CTX_INCLUDE_PAUTH_REGS := 1 54endif 55 56TRNG_SUPPORT := 1 57 58# TC RESOLUTION - LIST OF VALID OPTIONS (this impacts only FVP) 59TC_RESOLUTION_OPTIONS := 640x480p60 \ 60 1920x1080p60 61# Set default to the 640x480p60 resolution mode 62TC_RESOLUTION ?= $(firstword $(TC_RESOLUTION_OPTIONS)) 63 64# Check resolution option for FVP 65ifneq ($(filter ${TARGET_FLAVOUR}, fvp),) 66ifeq ($(filter ${TC_RESOLUTION}, ${TC_RESOLUTION_OPTIONS}),) 67 $(error TC_RESOLUTION is ${TC_RESOLUTION}, it must be: ${TC_RESOLUTION_OPTIONS}) 68endif 69endif 70 71ifneq ($(shell expr $(TARGET_PLATFORM) \<= 1), 0) 72 $(error Platform ${PLAT}$(TARGET_PLATFORM) is no longer available.) 73endif 74 75ifneq ($(shell expr $(TARGET_PLATFORM) = 2), 0) 76 $(warning Platform ${PLAT}$(TARGET_PLATFORM) is deprecated. \ 77 Some of the features might not work as expected) 78endif 79 80ifeq ($(shell expr $(TARGET_PLATFORM) \<= 4), 0) 81 $(error TARGET_PLATFORM must be less than or equal to 4) 82endif 83 84ifeq ($(filter ${TARGET_FLAVOUR}, fvp fpga),) 85 $(error TARGET_FLAVOUR must be fvp or fpga) 86endif 87 88# Support for loading FS Image to DRAM 89TC_FPGA_FS_IMG_IN_RAM := 0 90 91# Support Loading of FIP image to DRAM 92TC_FPGA_FIP_IMG_IN_RAM := 0 93 94# Use simple panel instead of vencoder with DPU 95TC_DPU_USE_SIMPLE_PANEL := 0 96 97$(eval $(call add_defines, \ 98 TARGET_PLATFORM \ 99 TARGET_FLAVOUR_$(call uppercase,${TARGET_FLAVOUR}) \ 100 TC_RESOLUTION_$(call uppercase,${TC_RESOLUTION}) \ 101 TC_DPU_USE_SCMI_CLK \ 102 TC_SCMI_PD_CTRL_EN \ 103 TC_FPGA_FS_IMG_IN_RAM \ 104 TC_FPGA_FIP_IMG_IN_RAM \ 105 TC_DPU_USE_SIMPLE_PANEL \ 106)) 107 108CSS_LOAD_SCP_IMAGES := 1 109 110# Save DSU PMU registers on cluster off and restore them on cluster on 111PRESERVE_DSU_PMU_REGS := 1 112 113# Specify MHU type based on platform 114ifneq ($(filter ${TARGET_PLATFORM}, 2),) 115 PLAT_MHU := MHUv2 116else 117 PLAT_MHU := MHUv3 118endif 119 120# Include GICv3 driver files 121include drivers/arm/gic/v3/gicv3.mk 122 123ENT_GIC_SOURCES := ${GICV3_SOURCES} \ 124 plat/common/plat_gicv3.c \ 125 plat/arm/common/arm_gicv3.c 126 127TC_BASE = plat/arm/board/tc 128 129PLAT_INCLUDES += -I${TC_BASE}/include/ \ 130 -I${TC_BASE}/fdts/ 131 132# CPU libraries for TARGET_PLATFORM=1 133ifeq (${TARGET_PLATFORM}, 1) 134TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a510.S \ 135 lib/cpus/aarch64/cortex_a715.S \ 136 lib/cpus/aarch64/cortex_x3.S 137endif 138 139# CPU libraries for TARGET_PLATFORM=2 140ifeq (${TARGET_PLATFORM}, 2) 141ERRATA_A520_2938996 := 1 142ERRATA_X4_2726228 := 1 143 144TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a520.S \ 145 lib/cpus/aarch64/cortex_a720.S \ 146 lib/cpus/aarch64/cortex_x4.S 147endif 148 149# CPU libraries for TARGET_PLATFORM=3 150ifeq (${TARGET_PLATFORM}, 3) 151ERRATA_A520_2938996 := 1 152 153TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a520.S \ 154 lib/cpus/aarch64/cortex_a725.S \ 155 lib/cpus/aarch64/cortex_x925.S 156endif 157 158# CPU libraries for TARGET_PLATFORM=4 159ifeq (${TARGET_PLATFORM}, 4) 160FEAT_PABANDON := 1 161# prevent CME related wakups 162ERRATA_SME_POWER_DOWN := 1 163TC_CPU_SOURCES += lib/cpus/aarch64/cortex_gelas.S \ 164 lib/cpus/aarch64/nevis.S \ 165 lib/cpus/aarch64/travis.S 166endif 167 168INTERCONNECT_SOURCES := ${TC_BASE}/tc_interconnect.c \ 169 plat/arm/common/arm_ni.c 170 171PLAT_BL_COMMON_SOURCES += ${TC_BASE}/tc_plat.c \ 172 ${TC_BASE}/include/tc_helpers.S 173 174 175ifneq (${ENABLE_STACK_PROTECTOR},0) 176PLAT_BL_COMMON_SOURCES += ${TC_BASE}/tc_stack_protector.c 177endif 178 179BL1_SOURCES += ${INTERCONNECT_SOURCES} \ 180 ${TC_CPU_SOURCES} \ 181 ${TC_BASE}/tc_trusted_boot.c \ 182 ${TC_BASE}/tc_bl1_setup.c \ 183 ${TC_BASE}/tc_err.c \ 184 drivers/arm/sbsa/sbsa.c 185 186BL2_SOURCES += ${TC_BASE}/tc_security.c \ 187 ${TC_BASE}/tc_err.c \ 188 ${TC_BASE}/tc_trusted_boot.c \ 189 ${TC_BASE}/tc_bl2_setup.c \ 190 lib/utils/mem_region.c \ 191 drivers/arm/tzc/tzc400.c \ 192 plat/arm/common/arm_nor_psci_mem_protect.c 193 194ifeq ($(shell test $(TARGET_PLATFORM) -le 2; echo $$?),0) 195BL2_SOURCES += plat/arm/common/arm_tzc400.c 196endif 197 198BL31_SOURCES += ${INTERCONNECT_SOURCES} \ 199 ${TC_CPU_SOURCES} \ 200 ${ENT_GIC_SOURCES} \ 201 ${TC_BASE}/tc_bl31_setup.c \ 202 ${TC_BASE}/tc_topology.c \ 203 lib/fconf/fconf.c \ 204 lib/fconf/fconf_dyn_cfg_getter.c \ 205 drivers/arm/css/dsu/dsu.c \ 206 drivers/cfi/v2m/v2m_flash.c \ 207 lib/utils/mem_region.c \ 208 plat/arm/common/arm_nor_psci_mem_protect.c \ 209 drivers/arm/sbsa/sbsa.c 210 211BL31_SOURCES += ${FDT_WRAPPERS_SOURCES} 212 213# Add the FDT_SOURCES and options for Dynamic Config 214FDT_SOURCES += ${TC_BASE}/fdts/${PLAT}_fw_config.dts \ 215 ${TC_BASE}/fdts/${PLAT}_tb_fw_config.dts \ 216 ${TC_BASE}/fdts/${PLAT}_nt_fw_config.dts 217FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb 218TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb 219FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb 220 221# Add the FW_CONFIG to FIP and specify the same to certtool 222$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG})) 223# Add the TB_FW_CONFIG to FIP and specify the same to certtool 224$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG})) 225# Add the NT_FW_CONFIG to FIP and specify the same to certtool 226$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config,${FVP_NT_FW_CONFIG})) 227 228ifeq (${SPD},spmd) 229ifeq ($(ARM_SPMC_MANIFEST_DTS),) 230ARM_SPMC_MANIFEST_DTS := ${TC_BASE}/fdts/${PLAT}_spmc_test_manifest.dts 231endif 232 233FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS} 234TC_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_SPMC_MANIFEST_DTS})).dtb 235 236# Add the TOS_FW_CONFIG to FIP and specify the same to certtool 237$(eval $(call TOOL_ADD_PAYLOAD,${TC_TOS_FW_CONFIG},--tos-fw-config,${TC_TOS_FW_CONFIG})) 238endif 239 240#Device tree 241TC_HW_CONFIG_DTS := fdts/${PLAT}${TARGET_PLATFORM}.dts 242TC_HW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}.dtb 243FDT_SOURCES += ${TC_HW_CONFIG_DTS} 244$(eval TC_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(TC_HW_CONFIG_DTS))) 245 246# Add the HW_CONFIG to FIP and specify the same to certtool 247$(eval $(call TOOL_ADD_PAYLOAD,${TC_HW_CONFIG},--hw-config,${TC_HW_CONFIG})) 248 249$(info Including rse_comms.mk) 250include drivers/arm/rse/rse_comms.mk 251 252BL1_SOURCES += ${RSE_COMMS_SOURCES} \ 253 plat/arm/board/tc/tc_rse_comms.c 254BL2_SOURCES += ${RSE_COMMS_SOURCES} \ 255 plat/arm/board/tc/tc_rse_comms.c 256BL31_SOURCES += ${RSE_COMMS_SOURCES} \ 257 plat/arm/board/tc/tc_rse_comms.c \ 258 lib/psa/rse_platform.c 259 260# Include Measured Boot makefile before any Crypto library makefile. 261# Crypto library makefile may need default definitions of Measured Boot build 262# flags present in Measured Boot makefile. 263ifeq (${MEASURED_BOOT},1) 264 ifeq (${DICE_PROTECTION_ENVIRONMENT},1) 265 $(info Including qcbor.mk) 266 include drivers/measured_boot/rse/qcbor.mk 267 $(info Including dice_prot_env.mk) 268 include drivers/measured_boot/rse/dice_prot_env.mk 269 270 BL1_SOURCES += ${QCBOR_SOURCES} \ 271 ${DPE_SOURCES} \ 272 plat/arm/board/tc/tc_common_dpe.c \ 273 plat/arm/board/tc/tc_bl1_dpe.c \ 274 lib/psa/dice_protection_environment.c \ 275 drivers/arm/css/sds/sds.c \ 276 drivers/delay_timer/delay_timer.c \ 277 drivers/delay_timer/generic_delay_timer.c 278 279 BL2_SOURCES += ${QCBOR_SOURCES} \ 280 ${DPE_SOURCES} \ 281 plat/arm/board/tc/tc_common_dpe.c \ 282 plat/arm/board/tc/tc_bl2_dpe.c \ 283 lib/psa/dice_protection_environment.c 284 285 PLAT_INCLUDES += -I${QCBOR_INCLUDES} \ 286 -Iinclude/lib/dice 287 else 288 $(info Including rse_measured_boot.mk) 289 include drivers/measured_boot/rse/rse_measured_boot.mk 290 291 BL1_SOURCES += ${MEASURED_BOOT_SOURCES} \ 292 plat/arm/board/tc/tc_common_measured_boot.c \ 293 plat/arm/board/tc/tc_bl1_measured_boot.c \ 294 lib/psa/measured_boot.c 295 296 BL2_SOURCES += ${MEASURED_BOOT_SOURCES} \ 297 plat/arm/board/tc/tc_common_measured_boot.c \ 298 plat/arm/board/tc/tc_bl2_measured_boot.c \ 299 lib/psa/measured_boot.c 300 endif 301endif 302 303BL31_SOURCES += plat/arm/board/tc/tc_trng.c 304 305ifneq (${ENABLE_FEAT_RNG_TRAP},0) 306 BL31_SOURCES += plat/arm/board/tc/tc_rng_trap.c 307endif 308 309ifneq (${PLATFORM_TEST},) 310 # Add this include as first, before arm_common.mk. This is necessary 311 # because arm_common.mk builds Mbed TLS, and platform_test.mk can 312 # change the list of Mbed TLS files that are to be compiled 313 # (LIBMBEDTLS_SRCS). 314 include plat/arm/board/tc/platform_test.mk 315endif 316 317 318include plat/arm/common/arm_common.mk 319include plat/arm/css/common/css_common.mk 320include plat/arm/board/common/board_common.mk 321