1# Copyright (c) 2021-2025, Arm Limited. All rights reserved. 2# 3# SPDX-License-Identifier: BSD-3-Clause 4# 5 6include common/fdt_wrappers.mk 7 8# TARGET_PLATFORM must be defined as a pre-requisite 9$(eval $(call assert_numerics,TARGET_PLATFORM)) 10 11TARGET_FLAVOUR := fvp 12# DPU with SCMI may not necessarily work, so allow its independence 13TC_DPU_USE_SCMI_CLK := 1 14# SCMI power domain control enable 15TC_SCMI_PD_CTRL_EN := 1 16 17# System setup 18CSS_USE_SCMI_SDS_DRIVER := 1 19HW_ASSISTED_COHERENCY := 1 20USE_COHERENT_MEM := 0 21USE_GIC_DRIVER := 3 22USE_DSU_DRIVER := 1 23GIC_ENABLE_V4_EXTN := 1 24GICV3_SUPPORT_GIC600 := 1 25override NEED_BL2U := no 26override ARM_PLAT_MT := 1 27 28# CPU setup 29ARM_ARCH_MINOR := 7 30BRANCH_PROTECTION := 1 31ENABLE_FEAT_MPAM := 1 # default is 2, optimise 32ENABLE_SVE_FOR_NS := 2 # to show we use it 33ENABLE_SVE_FOR_SWD := 1 34ENABLE_SME_FOR_NS := 2 35ENABLE_SME2_FOR_NS := 2 36ENABLE_SME_FOR_SWD := 1 37ENABLE_TRBE_FOR_NS := 1 38ENABLE_SYS_REG_TRACE_FOR_NS := 1 39ENABLE_FEAT_AMU := 1 40ENABLE_AMU_AUXILIARY_COUNTERS := 1 41ENABLE_MPMM := 1 42ENABLE_FEAT_MTE2 := 2 43ENABLE_SPE_FOR_NS := 2 44ENABLE_FEAT_TCR2 := 2 45 46ifneq ($(filter ${TARGET_PLATFORM}, 3),) 47ENABLE_FEAT_RNG_TRAP := 0 48else 49ENABLE_FEAT_RNG_TRAP := 1 50endif 51 52CTX_INCLUDE_AARCH32_REGS := 0 53 54ifeq (${SPD},spmd) 55 SPMD_SPM_AT_SEL2 := 1 56 CTX_INCLUDE_PAUTH_REGS := 1 57endif 58 59TRNG_SUPPORT := 1 60 61# TC RESOLUTION - LIST OF VALID OPTIONS (this impacts only FVP) 62TC_RESOLUTION_OPTIONS := 640x480p60 \ 63 1920x1080p60 64# Set default to the 640x480p60 resolution mode 65TC_RESOLUTION ?= $(firstword $(TC_RESOLUTION_OPTIONS)) 66 67# Check resolution option for FVP 68ifneq ($(filter ${TARGET_FLAVOUR}, fvp),) 69ifeq ($(filter ${TC_RESOLUTION}, ${TC_RESOLUTION_OPTIONS}),) 70 $(error TC_RESOLUTION is ${TC_RESOLUTION}, it must be: ${TC_RESOLUTION_OPTIONS}) 71endif 72endif 73 74ifneq ($(shell expr $(TARGET_PLATFORM) \<= 2), 0) 75 $(error Platform ${PLAT}$(TARGET_PLATFORM) is no longer available.) 76endif 77 78ifeq ($(shell expr $(TARGET_PLATFORM) \<= 4), 0) 79 $(error TARGET_PLATFORM must be less than or equal to 4) 80endif 81 82ifeq ($(filter ${TARGET_FLAVOUR}, fvp fpga),) 83 $(error TARGET_FLAVOUR must be fvp or fpga) 84endif 85 86# Support for loading FS Image to DRAM 87TC_FPGA_FS_IMG_IN_RAM := 0 88 89# Support Loading of FIP image to DRAM 90TC_FPGA_FIP_IMG_IN_RAM := 0 91 92# Use simple panel instead of vencoder with DPU 93TC_DPU_USE_SIMPLE_PANEL := 0 94 95$(eval $(call add_defines, \ 96 TARGET_PLATFORM \ 97 TARGET_FLAVOUR_$(call uppercase,${TARGET_FLAVOUR}) \ 98 TC_RESOLUTION_$(call uppercase,${TC_RESOLUTION}) \ 99 TC_DPU_USE_SCMI_CLK \ 100 TC_SCMI_PD_CTRL_EN \ 101 TC_FPGA_FS_IMG_IN_RAM \ 102 TC_FPGA_FIP_IMG_IN_RAM \ 103 TC_DPU_USE_SIMPLE_PANEL \ 104)) 105 106CSS_LOAD_SCP_IMAGES := 1 107 108# Save DSU PMU registers on cluster off and restore them on cluster on 109PRESERVE_DSU_PMU_REGS := 1 110 111PLAT_MHU := MHUv3 112 113TC_BASE = plat/arm/board/tc 114 115PLAT_INCLUDES += -I${TC_BASE}/include/ \ 116 -I${TC_BASE}/fdts/ 117 118# CPU libraries for TARGET_PLATFORM=3 119ifeq (${TARGET_PLATFORM}, 3) 120ERRATA_A520_2938996 := 1 121 122TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a520.S \ 123 lib/cpus/aarch64/cortex_a725.S \ 124 lib/cpus/aarch64/cortex_x925.S 125endif 126 127# CPU libraries for TARGET_PLATFORM=4 128ifeq (${TARGET_PLATFORM}, 4) 129 130# prevent CME related wakups 131ERRATA_SME_POWER_DOWN := 1 132TC_CPU_SOURCES += lib/cpus/aarch64/c1_pro.S \ 133 lib/cpus/aarch64/c1_nano.S \ 134 lib/cpus/aarch64/c1_ultra.S 135endif 136 137INTERCONNECT_SOURCES := plat/arm/common/arm_ni.c 138 139PLAT_BL_COMMON_SOURCES += ${TC_BASE}/tc_plat.c \ 140 ${TC_BASE}/include/tc_helpers.S 141 142 143ifneq (${ENABLE_STACK_PROTECTOR},0) 144PLAT_BL_COMMON_SOURCES += ${TC_BASE}/tc_stack_protector.c 145endif 146 147BL1_SOURCES += ${INTERCONNECT_SOURCES} \ 148 ${TC_CPU_SOURCES} \ 149 ${TC_BASE}/tc_trusted_boot.c \ 150 ${TC_BASE}/tc_bl1_setup.c \ 151 ${TC_BASE}/tc_err.c \ 152 drivers/arm/sbsa/sbsa.c 153 154BL2_SOURCES += ${TC_BASE}/tc_security.c \ 155 ${TC_BASE}/tc_err.c \ 156 ${TC_BASE}/tc_trusted_boot.c \ 157 ${TC_BASE}/tc_bl2_setup.c \ 158 lib/utils/mem_region.c \ 159 drivers/arm/tzc/tzc400.c \ 160 plat/arm/common/arm_nor_psci_mem_protect.c 161 162BL31_SOURCES += ${INTERCONNECT_SOURCES} \ 163 ${TC_CPU_SOURCES} \ 164 ${TC_BASE}/tc_bl31_setup.c \ 165 ${TC_BASE}/tc_topology.c \ 166 lib/fconf/fconf.c \ 167 lib/fconf/fconf_dyn_cfg_getter.c \ 168 drivers/arm/dsu/dsu.c \ 169 drivers/cfi/v2m/v2m_flash.c \ 170 lib/utils/mem_region.c \ 171 plat/arm/common/arm_nor_psci_mem_protect.c \ 172 drivers/arm/sbsa/sbsa.c 173 174BL31_SOURCES += ${FDT_WRAPPERS_SOURCES} 175 176# Add the FDT_SOURCES and options for Dynamic Config 177FDT_SOURCES += ${TC_BASE}/fdts/${PLAT}_fw_config.dts \ 178 ${TC_BASE}/fdts/${PLAT}_tb_fw_config.dts \ 179 ${TC_BASE}/fdts/${PLAT}_nt_fw_config.dts 180FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb 181TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb 182FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb 183 184# Add the FW_CONFIG to FIP and specify the same to certtool 185$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG})) 186# Add the TB_FW_CONFIG to FIP and specify the same to certtool 187$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG})) 188# Add the NT_FW_CONFIG to FIP and specify the same to certtool 189$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config,${FVP_NT_FW_CONFIG})) 190 191ifeq (${SPD},spmd) 192ifeq ($(ARM_SPMC_MANIFEST_DTS),) 193ARM_SPMC_MANIFEST_DTS := ${TC_BASE}/fdts/${PLAT}_spmc_test_manifest.dts 194endif 195 196FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS} 197TC_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_SPMC_MANIFEST_DTS})).dtb 198 199# Add the TOS_FW_CONFIG to FIP and specify the same to certtool 200$(eval $(call TOOL_ADD_PAYLOAD,${TC_TOS_FW_CONFIG},--tos-fw-config,${TC_TOS_FW_CONFIG})) 201endif 202 203#Device tree 204TC_HW_CONFIG_DTS := fdts/${PLAT}${TARGET_PLATFORM}.dts 205TC_HW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}.dtb 206FDT_SOURCES += ${TC_HW_CONFIG_DTS} 207$(eval TC_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(TC_HW_CONFIG_DTS))) 208 209# Add the HW_CONFIG to FIP and specify the same to certtool 210$(eval $(call TOOL_ADD_PAYLOAD,${TC_HW_CONFIG},--hw-config,${TC_HW_CONFIG})) 211 212$(info Including rse_comms.mk) 213include drivers/arm/rse/rse_comms.mk 214 215BL1_SOURCES += ${RSE_COMMS_SOURCES} \ 216 plat/arm/board/tc/tc_rse_comms.c 217BL2_SOURCES += ${RSE_COMMS_SOURCES} \ 218 plat/arm/board/tc/tc_rse_comms.c 219BL31_SOURCES += ${RSE_COMMS_SOURCES} \ 220 plat/arm/board/tc/tc_rse_comms.c \ 221 lib/psa/rse_platform.c 222 223# Include Measured Boot makefile before any Crypto library makefile. 224# Crypto library makefile may need default definitions of Measured Boot build 225# flags present in Measured Boot makefile. 226ifeq (${MEASURED_BOOT},1) 227 ifeq (${DICE_PROTECTION_ENVIRONMENT},1) 228 $(info Including qcbor.mk) 229 include drivers/measured_boot/rse/qcbor.mk 230 $(info Including dice_prot_env.mk) 231 include drivers/measured_boot/rse/dice_prot_env.mk 232 233 BL1_SOURCES += ${QCBOR_SOURCES} \ 234 ${DPE_SOURCES} \ 235 plat/arm/board/tc/tc_common_dpe.c \ 236 plat/arm/board/tc/tc_bl1_dpe.c \ 237 lib/psa/dice_protection_environment.c \ 238 drivers/arm/css/sds/sds.c \ 239 drivers/delay_timer/delay_timer.c \ 240 drivers/delay_timer/generic_delay_timer.c 241 242 BL2_SOURCES += ${QCBOR_SOURCES} \ 243 ${DPE_SOURCES} \ 244 plat/arm/board/tc/tc_common_dpe.c \ 245 plat/arm/board/tc/tc_bl2_dpe.c \ 246 lib/psa/dice_protection_environment.c 247 248 PLAT_INCLUDES += -I${QCBOR_INCLUDES} \ 249 -Iinclude/lib/dice 250 else 251 $(info Including rse_measured_boot.mk) 252 include drivers/measured_boot/rse/rse_measured_boot.mk 253 254 BL1_SOURCES += ${MEASURED_BOOT_SOURCES} \ 255 plat/arm/board/tc/tc_common_measured_boot.c \ 256 plat/arm/board/tc/tc_bl1_measured_boot.c \ 257 lib/psa/measured_boot.c 258 259 BL2_SOURCES += ${MEASURED_BOOT_SOURCES} \ 260 plat/arm/board/tc/tc_common_measured_boot.c \ 261 plat/arm/board/tc/tc_bl2_measured_boot.c \ 262 lib/psa/measured_boot.c 263 endif 264endif 265 266BL31_SOURCES += plat/arm/board/tc/tc_trng.c 267 268ifneq (${ENABLE_FEAT_RNG_TRAP},0) 269 BL31_SOURCES += plat/arm/board/tc/tc_rng_trap.c 270endif 271 272ifneq (${PLATFORM_TEST},) 273 # Add this include as first, before arm_common.mk. This is necessary 274 # because arm_common.mk builds Mbed TLS, and platform_test.mk can 275 # change the list of Mbed TLS files that are to be compiled 276 # (LIBMBEDTLS_SRCS). 277 include plat/arm/board/tc/platform_test.mk 278endif 279 280 281include plat/arm/common/arm_common.mk 282include plat/arm/css/common/css_common.mk 283include plat/arm/board/common/board_common.mk 284