1# Copyright (c) 2021, Arm Limited. All rights reserved. 2# 3# SPDX-License-Identifier: BSD-3-Clause 4# 5 6include common/fdt_wrappers.mk 7 8ifeq ($(filter ${TARGET_PLATFORM}, 0 1),) 9 $(error TARGET_PLATFORM must be 0 or 1) 10endif 11 12CSS_LOAD_SCP_IMAGES := 1 13 14CSS_USE_SCMI_SDS_DRIVER := 1 15 16RAS_EXTENSION := 0 17 18SDEI_SUPPORT := 0 19 20EL3_EXCEPTION_HANDLING := 0 21 22HANDLE_EA_EL3_FIRST := 0 23 24# System coherency is managed in hardware 25HW_ASSISTED_COHERENCY := 1 26 27# When building for systems with hardware-assisted coherency, there's no need to 28# use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too. 29USE_COHERENT_MEM := 0 30 31GIC_ENABLE_V4_EXTN := 1 32 33# GIC-600 configuration 34GICV3_SUPPORT_GIC600 := 1 35 36# Enable SVE 37ENABLE_SVE_FOR_NS := 1 38ENABLE_SVE_FOR_SWD := 1 39 40# enable trace buffer control registers access to NS by default 41ENABLE_TRBE_FOR_NS := 1 42 43# enable trace system registers access to NS by default 44ENABLE_SYS_REG_TRACE_FOR_NS := 1 45 46# enable trace filter control registers access to NS by default 47ENABLE_TRF_FOR_NS := 1 48 49# Include GICv3 driver files 50include drivers/arm/gic/v3/gicv3.mk 51 52ENT_GIC_SOURCES := ${GICV3_SOURCES} \ 53 plat/common/plat_gicv3.c \ 54 plat/arm/common/arm_gicv3.c 55 56override NEED_BL2U := no 57 58override ARM_PLAT_MT := 1 59 60TC_BASE = plat/arm/board/tc 61 62PLAT_INCLUDES += -I${TC_BASE}/include/ 63 64# Common CPU libraries 65TC_CPU_SOURCES := lib/cpus/aarch64/cortex_a510.S 66 67# CPU libraries for TARGET_PLATFORM=0 68ifeq (${TARGET_PLATFORM}, 0) 69TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a710.S \ 70 lib/cpus/aarch64/cortex_x2.S 71endif 72 73# CPU libraries for TARGET_PLATFORM=1 74ifeq (${TARGET_PLATFORM}, 1) 75TC_CPU_SOURCES += lib/cpus/aarch64/cortex_makalu.S \ 76 lib/cpus/aarch64/cortex_makalu_elp_arm.S 77endif 78 79INTERCONNECT_SOURCES := ${TC_BASE}/tc_interconnect.c 80 81PLAT_BL_COMMON_SOURCES += ${TC_BASE}/tc_plat.c \ 82 ${TC_BASE}/include/tc_helpers.S 83 84BL1_SOURCES += ${INTERCONNECT_SOURCES} \ 85 ${TC_CPU_SOURCES} \ 86 ${TC_BASE}/tc_trusted_boot.c \ 87 ${TC_BASE}/tc_err.c \ 88 drivers/arm/sbsa/sbsa.c 89 90 91BL2_SOURCES += ${TC_BASE}/tc_security.c \ 92 ${TC_BASE}/tc_err.c \ 93 ${TC_BASE}/tc_trusted_boot.c \ 94 ${TC_BASE}/tc_bl2_setup.c \ 95 lib/utils/mem_region.c \ 96 drivers/arm/tzc/tzc400.c \ 97 plat/arm/common/arm_tzc400.c \ 98 plat/arm/common/arm_nor_psci_mem_protect.c 99 100BL31_SOURCES += ${INTERCONNECT_SOURCES} \ 101 ${TC_CPU_SOURCES} \ 102 ${ENT_GIC_SOURCES} \ 103 ${TC_BASE}/tc_bl31_setup.c \ 104 ${TC_BASE}/tc_topology.c \ 105 lib/fconf/fconf.c \ 106 lib/fconf/fconf_dyn_cfg_getter.c \ 107 drivers/cfi/v2m/v2m_flash.c \ 108 lib/utils/mem_region.c \ 109 plat/arm/common/arm_nor_psci_mem_protect.c 110 111BL31_SOURCES += ${FDT_WRAPPERS_SOURCES} 112 113# Add the FDT_SOURCES and options for Dynamic Config 114FDT_SOURCES += ${TC_BASE}/fdts/${PLAT}_fw_config.dts \ 115 ${TC_BASE}/fdts/${PLAT}_tb_fw_config.dts 116FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb 117TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb 118 119# Add the FW_CONFIG to FIP and specify the same to certtool 120$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG})) 121# Add the TB_FW_CONFIG to FIP and specify the same to certtool 122$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG})) 123 124ifeq (${SPD},spmd) 125ifeq ($(ARM_SPMC_MANIFEST_DTS),) 126ARM_SPMC_MANIFEST_DTS := ${TC_BASE}/fdts/${PLAT}_spmc_manifest.dts 127endif 128 129FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS} 130TC_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_SPMC_MANIFEST_DTS})).dtb 131 132# Add the TOS_FW_CONFIG to FIP and specify the same to certtool 133$(eval $(call TOOL_ADD_PAYLOAD,${TC_TOS_FW_CONFIG},--tos-fw-config,${TC_TOS_FW_CONFIG})) 134endif 135 136#Device tree 137TC_HW_CONFIG_DTS := fdts/tc.dts 138TC_HW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}.dtb 139FDT_SOURCES += ${TC_HW_CONFIG_DTS} 140$(eval TC_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(TC_HW_CONFIG_DTS))) 141 142# Add the HW_CONFIG to FIP and specify the same to certtool 143$(eval $(call TOOL_ADD_PAYLOAD,${TC_HW_CONFIG},--hw-config,${TC_HW_CONFIG})) 144 145override CTX_INCLUDE_AARCH32_REGS := 0 146 147override CTX_INCLUDE_PAUTH_REGS := 1 148 149override ENABLE_SPE_FOR_LOWER_ELS := 0 150 151override ENABLE_AMU := 1 152override ENABLE_AMU_AUXILIARY_COUNTERS := 1 153override ENABLE_AMU_FCONF := 1 154 155override ENABLE_MPMM := 1 156override ENABLE_MPMM_FCONF := 1 157 158include plat/arm/common/arm_common.mk 159include plat/arm/css/common/css_common.mk 160include plat/arm/soc/common/soc_css.mk 161include plat/arm/board/common/board_common.mk 162