1# Copyright (c) 2021-2022, Arm Limited. All rights reserved. 2# 3# SPDX-License-Identifier: BSD-3-Clause 4# 5 6include common/fdt_wrappers.mk 7 8ifeq ($(filter ${TARGET_PLATFORM}, 0 1),) 9 $(error TARGET_PLATFORM must be 0 or 1) 10endif 11 12$(eval $(call add_define,TARGET_PLATFORM)) 13 14CSS_LOAD_SCP_IMAGES := 1 15 16CSS_USE_SCMI_SDS_DRIVER := 1 17 18RAS_EXTENSION := 0 19 20SDEI_SUPPORT := 0 21 22EL3_EXCEPTION_HANDLING := 0 23 24HANDLE_EA_EL3_FIRST := 0 25 26# System coherency is managed in hardware 27HW_ASSISTED_COHERENCY := 1 28 29# When building for systems with hardware-assisted coherency, there's no need to 30# use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too. 31USE_COHERENT_MEM := 0 32 33GIC_ENABLE_V4_EXTN := 1 34 35# GIC-600 configuration 36GICV3_SUPPORT_GIC600 := 1 37 38# Enable SVE 39ENABLE_SVE_FOR_NS := 1 40ENABLE_SVE_FOR_SWD := 1 41 42# enable trace buffer control registers access to NS by default 43ENABLE_TRBE_FOR_NS := 1 44 45# enable trace system registers access to NS by default 46ENABLE_SYS_REG_TRACE_FOR_NS := 1 47 48# enable trace filter control registers access to NS by default 49ENABLE_TRF_FOR_NS := 1 50 51# Include GICv3 driver files 52include drivers/arm/gic/v3/gicv3.mk 53 54ENT_GIC_SOURCES := ${GICV3_SOURCES} \ 55 plat/common/plat_gicv3.c \ 56 plat/arm/common/arm_gicv3.c 57 58override NEED_BL2U := no 59 60override ARM_PLAT_MT := 1 61 62TC_BASE = plat/arm/board/tc 63 64PLAT_INCLUDES += -I${TC_BASE}/include/ 65 66# Common CPU libraries 67TC_CPU_SOURCES := lib/cpus/aarch64/cortex_a510.S 68 69# CPU libraries for TARGET_PLATFORM=0 70ifeq (${TARGET_PLATFORM}, 0) 71TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a710.S \ 72 lib/cpus/aarch64/cortex_x2.S 73endif 74 75# CPU libraries for TARGET_PLATFORM=1 76ifeq (${TARGET_PLATFORM}, 1) 77TC_CPU_SOURCES += lib/cpus/aarch64/cortex_makalu.S \ 78 lib/cpus/aarch64/cortex_makalu_elp_arm.S 79endif 80 81INTERCONNECT_SOURCES := ${TC_BASE}/tc_interconnect.c 82 83PLAT_BL_COMMON_SOURCES += ${TC_BASE}/tc_plat.c \ 84 ${TC_BASE}/include/tc_helpers.S 85 86BL1_SOURCES += ${INTERCONNECT_SOURCES} \ 87 ${TC_CPU_SOURCES} \ 88 ${TC_BASE}/tc_trusted_boot.c \ 89 ${TC_BASE}/tc_err.c \ 90 drivers/arm/sbsa/sbsa.c 91 92 93BL2_SOURCES += ${TC_BASE}/tc_security.c \ 94 ${TC_BASE}/tc_err.c \ 95 ${TC_BASE}/tc_trusted_boot.c \ 96 ${TC_BASE}/tc_bl2_setup.c \ 97 lib/utils/mem_region.c \ 98 drivers/arm/tzc/tzc400.c \ 99 plat/arm/common/arm_tzc400.c \ 100 plat/arm/common/arm_nor_psci_mem_protect.c 101 102BL31_SOURCES += ${INTERCONNECT_SOURCES} \ 103 ${TC_CPU_SOURCES} \ 104 ${ENT_GIC_SOURCES} \ 105 ${TC_BASE}/tc_bl31_setup.c \ 106 ${TC_BASE}/tc_topology.c \ 107 lib/fconf/fconf.c \ 108 lib/fconf/fconf_dyn_cfg_getter.c \ 109 drivers/cfi/v2m/v2m_flash.c \ 110 lib/utils/mem_region.c \ 111 plat/arm/common/arm_nor_psci_mem_protect.c 112 113BL31_SOURCES += ${FDT_WRAPPERS_SOURCES} 114 115# Add the FDT_SOURCES and options for Dynamic Config 116FDT_SOURCES += ${TC_BASE}/fdts/${PLAT}_fw_config.dts \ 117 ${TC_BASE}/fdts/${PLAT}_tb_fw_config.dts 118FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb 119TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb 120 121# Add the FW_CONFIG to FIP and specify the same to certtool 122$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG})) 123# Add the TB_FW_CONFIG to FIP and specify the same to certtool 124$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG})) 125 126ifeq (${SPD},spmd) 127ifeq ($(ARM_SPMC_MANIFEST_DTS),) 128ARM_SPMC_MANIFEST_DTS := ${TC_BASE}/fdts/${PLAT}_spmc_manifest.dts 129endif 130 131FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS} 132TC_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_SPMC_MANIFEST_DTS})).dtb 133 134# Add the TOS_FW_CONFIG to FIP and specify the same to certtool 135$(eval $(call TOOL_ADD_PAYLOAD,${TC_TOS_FW_CONFIG},--tos-fw-config,${TC_TOS_FW_CONFIG})) 136endif 137 138#Device tree 139TC_HW_CONFIG_DTS := fdts/tc.dts 140TC_HW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}.dtb 141FDT_SOURCES += ${TC_HW_CONFIG_DTS} 142$(eval TC_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(TC_HW_CONFIG_DTS))) 143 144# Add the HW_CONFIG to FIP and specify the same to certtool 145$(eval $(call TOOL_ADD_PAYLOAD,${TC_HW_CONFIG},--hw-config,${TC_HW_CONFIG})) 146 147override CTX_INCLUDE_AARCH32_REGS := 0 148 149override CTX_INCLUDE_PAUTH_REGS := 1 150 151override ENABLE_SPE_FOR_LOWER_ELS := 0 152 153override ENABLE_AMU := 1 154override ENABLE_AMU_AUXILIARY_COUNTERS := 1 155override ENABLE_AMU_FCONF := 1 156 157override ENABLE_MPMM := 1 158override ENABLE_MPMM_FCONF := 1 159 160include plat/arm/common/arm_common.mk 161include plat/arm/css/common/css_common.mk 162include plat/arm/soc/common/soc_css.mk 163include plat/arm/board/common/board_common.mk 164