1# Copyright (c) 2021-2025, Arm Limited. All rights reserved. 2# 3# SPDX-License-Identifier: BSD-3-Clause 4# 5 6include common/fdt_wrappers.mk 7 8TARGET_FLAVOUR := fvp 9# DPU with SCMI may not necessarily work, so allow its independence 10TC_DPU_USE_SCMI_CLK := 1 11# SCMI power domain control enable 12TC_SCMI_PD_CTRL_EN := 1 13 14# System setup 15CSS_USE_SCMI_SDS_DRIVER := 1 16HW_ASSISTED_COHERENCY := 1 17USE_COHERENT_MEM := 0 18GIC_ENABLE_V4_EXTN := 1 19GICV3_SUPPORT_GIC600 := 1 20override NEED_BL2U := no 21override ARM_PLAT_MT := 1 22 23# CPU setup 24ARM_ARCH_MINOR := 7 25BRANCH_PROTECTION := 1 26ENABLE_FEAT_MPAM := 1 # default is 2, optimise 27ENABLE_SVE_FOR_NS := 2 # to show we use it 28ENABLE_SVE_FOR_SWD := 1 29ENABLE_SME_FOR_NS := 2 30ENABLE_SME2_FOR_NS := 2 31ENABLE_SME_FOR_SWD := 1 32ENABLE_TRBE_FOR_NS := 1 33ENABLE_SYS_REG_TRACE_FOR_NS := 1 34ENABLE_FEAT_AMU := 1 35ENABLE_AMU_AUXILIARY_COUNTERS := 1 36ENABLE_MPMM := 1 37ENABLE_FEAT_MTE2 := 2 38ENABLE_SPE_FOR_NS := 3 39ENABLE_FEAT_TCR2 := 3 40 41ifneq ($(filter ${TARGET_PLATFORM}, 3),) 42ENABLE_FEAT_RNG_TRAP := 0 43else 44ENABLE_FEAT_RNG_TRAP := 1 45endif 46 47CTX_INCLUDE_AARCH32_REGS := 0 48 49ifeq (${SPD},spmd) 50 SPMD_SPM_AT_SEL2 := 1 51 CTX_INCLUDE_PAUTH_REGS := 1 52endif 53 54TRNG_SUPPORT := 1 55 56# TC RESOLUTION - LIST OF VALID OPTIONS (this impacts only FVP) 57TC_RESOLUTION_OPTIONS := 640x480p60 \ 58 1920x1080p60 59# Set default to the 640x480p60 resolution mode 60TC_RESOLUTION ?= $(firstword $(TC_RESOLUTION_OPTIONS)) 61 62# Check resolution option for FVP 63ifneq ($(filter ${TARGET_FLAVOUR}, fvp),) 64ifeq ($(filter ${TC_RESOLUTION}, ${TC_RESOLUTION_OPTIONS}),) 65 $(error TC_RESOLUTION is ${TC_RESOLUTION}, it must be: ${TC_RESOLUTION_OPTIONS}) 66endif 67endif 68 69ifneq ($(shell expr $(TARGET_PLATFORM) \<= 1), 0) 70 $(error Platform ${PLAT}$(TARGET_PLATFORM) is no longer available.) 71endif 72 73ifneq ($(shell expr $(TARGET_PLATFORM) = 2), 0) 74 $(warning Platform ${PLAT}$(TARGET_PLATFORM) is deprecated. \ 75 Some of the features might not work as expected) 76endif 77 78ifeq ($(shell expr $(TARGET_PLATFORM) \<= 4), 0) 79 $(error TARGET_PLATFORM must be less than or equal to 4) 80endif 81 82ifeq ($(filter ${TARGET_FLAVOUR}, fvp fpga),) 83 $(error TARGET_FLAVOUR must be fvp or fpga) 84endif 85 86# Support for loading FS Image to DRAM 87TC_FPGA_FS_IMG_IN_RAM := 0 88 89# Support Loading of FIP image to DRAM 90TC_FPGA_FIP_IMG_IN_RAM := 0 91 92# Use simple panel instead of vencoder with DPU 93TC_DPU_USE_SIMPLE_PANEL := 0 94 95$(eval $(call add_defines, \ 96 TARGET_PLATFORM \ 97 TARGET_FLAVOUR_$(call uppercase,${TARGET_FLAVOUR}) \ 98 TC_RESOLUTION_$(call uppercase,${TC_RESOLUTION}) \ 99 TC_DPU_USE_SCMI_CLK \ 100 TC_SCMI_PD_CTRL_EN \ 101 TC_FPGA_FS_IMG_IN_RAM \ 102 TC_FPGA_FIP_IMG_IN_RAM \ 103 TC_DPU_USE_SIMPLE_PANEL \ 104)) 105 106CSS_LOAD_SCP_IMAGES := 1 107 108# Save DSU PMU registers on cluster off and restore them on cluster on 109PRESERVE_DSU_PMU_REGS := 1 110 111# Specify MHU type based on platform 112ifneq ($(filter ${TARGET_PLATFORM}, 2),) 113 PLAT_MHU := MHUv2 114else 115 PLAT_MHU := MHUv3 116endif 117 118# Include GICv3 driver files 119include drivers/arm/gic/v3/gicv3.mk 120 121ENT_GIC_SOURCES := ${GICV3_SOURCES} \ 122 plat/common/plat_gicv3.c \ 123 plat/arm/common/arm_gicv3.c 124 125TC_BASE = plat/arm/board/tc 126 127PLAT_INCLUDES += -I${TC_BASE}/include/ \ 128 -I${TC_BASE}/fdts/ 129 130# CPU libraries for TARGET_PLATFORM=1 131ifeq (${TARGET_PLATFORM}, 1) 132TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a510.S \ 133 lib/cpus/aarch64/cortex_a715.S \ 134 lib/cpus/aarch64/cortex_x3.S 135endif 136 137# CPU libraries for TARGET_PLATFORM=2 138ifeq (${TARGET_PLATFORM}, 2) 139ERRATA_A520_2938996 := 1 140ERRATA_X4_2726228 := 1 141 142TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a520.S \ 143 lib/cpus/aarch64/cortex_a720.S \ 144 lib/cpus/aarch64/cortex_x4.S 145endif 146 147# CPU libraries for TARGET_PLATFORM=3 148ifeq (${TARGET_PLATFORM}, 3) 149ERRATA_A520_2938996 := 1 150 151TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a520.S \ 152 lib/cpus/aarch64/cortex_a725.S \ 153 lib/cpus/aarch64/cortex_x925.S 154endif 155 156# CPU libraries for TARGET_PLATFORM=4 157ifeq (${TARGET_PLATFORM}, 4) 158FEAT_PABANDON := 1 159# prevent CME related wakups 160ERRATA_SME_POWER_DOWN := 1 161TC_CPU_SOURCES += lib/cpus/aarch64/cortex_gelas.S \ 162 lib/cpus/aarch64/nevis.S \ 163 lib/cpus/aarch64/travis.S 164endif 165 166INTERCONNECT_SOURCES := ${TC_BASE}/tc_interconnect.c \ 167 plat/arm/common/arm_ni.c 168 169PLAT_BL_COMMON_SOURCES += ${TC_BASE}/tc_plat.c \ 170 ${TC_BASE}/include/tc_helpers.S 171 172 173ifneq (${ENABLE_STACK_PROTECTOR},0) 174PLAT_BL_COMMON_SOURCES += ${TC_BASE}/tc_stack_protector.c 175endif 176 177BL1_SOURCES += ${INTERCONNECT_SOURCES} \ 178 ${TC_CPU_SOURCES} \ 179 ${TC_BASE}/tc_trusted_boot.c \ 180 ${TC_BASE}/tc_bl1_setup.c \ 181 ${TC_BASE}/tc_err.c \ 182 drivers/arm/sbsa/sbsa.c 183 184BL2_SOURCES += ${TC_BASE}/tc_security.c \ 185 ${TC_BASE}/tc_err.c \ 186 ${TC_BASE}/tc_trusted_boot.c \ 187 ${TC_BASE}/tc_bl2_setup.c \ 188 lib/utils/mem_region.c \ 189 drivers/arm/tzc/tzc400.c \ 190 plat/arm/common/arm_nor_psci_mem_protect.c 191 192ifeq ($(shell test $(TARGET_PLATFORM) -le 2; echo $$?),0) 193BL2_SOURCES += plat/arm/common/arm_tzc400.c 194endif 195 196BL31_SOURCES += ${INTERCONNECT_SOURCES} \ 197 ${TC_CPU_SOURCES} \ 198 ${ENT_GIC_SOURCES} \ 199 ${TC_BASE}/tc_bl31_setup.c \ 200 ${TC_BASE}/tc_topology.c \ 201 lib/fconf/fconf.c \ 202 lib/fconf/fconf_dyn_cfg_getter.c \ 203 drivers/arm/css/dsu/dsu.c \ 204 drivers/cfi/v2m/v2m_flash.c \ 205 lib/utils/mem_region.c \ 206 plat/arm/common/arm_nor_psci_mem_protect.c \ 207 drivers/arm/sbsa/sbsa.c 208 209BL31_SOURCES += ${FDT_WRAPPERS_SOURCES} 210 211# Add the FDT_SOURCES and options for Dynamic Config 212FDT_SOURCES += ${TC_BASE}/fdts/${PLAT}_fw_config.dts \ 213 ${TC_BASE}/fdts/${PLAT}_tb_fw_config.dts \ 214 ${TC_BASE}/fdts/${PLAT}_nt_fw_config.dts 215FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb 216TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb 217FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb 218 219# Add the FW_CONFIG to FIP and specify the same to certtool 220$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG})) 221# Add the TB_FW_CONFIG to FIP and specify the same to certtool 222$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG})) 223# Add the NT_FW_CONFIG to FIP and specify the same to certtool 224$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config,${FVP_NT_FW_CONFIG})) 225 226ifeq (${SPD},spmd) 227ifeq ($(ARM_SPMC_MANIFEST_DTS),) 228ARM_SPMC_MANIFEST_DTS := ${TC_BASE}/fdts/${PLAT}_spmc_test_manifest.dts 229endif 230 231FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS} 232TC_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_SPMC_MANIFEST_DTS})).dtb 233 234# Add the TOS_FW_CONFIG to FIP and specify the same to certtool 235$(eval $(call TOOL_ADD_PAYLOAD,${TC_TOS_FW_CONFIG},--tos-fw-config,${TC_TOS_FW_CONFIG})) 236endif 237 238#Device tree 239TC_HW_CONFIG_DTS := fdts/${PLAT}${TARGET_PLATFORM}.dts 240TC_HW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}.dtb 241FDT_SOURCES += ${TC_HW_CONFIG_DTS} 242$(eval TC_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(TC_HW_CONFIG_DTS))) 243 244# Add the HW_CONFIG to FIP and specify the same to certtool 245$(eval $(call TOOL_ADD_PAYLOAD,${TC_HW_CONFIG},--hw-config,${TC_HW_CONFIG})) 246 247$(info Including rse_comms.mk) 248include drivers/arm/rse/rse_comms.mk 249 250BL1_SOURCES += ${RSE_COMMS_SOURCES} \ 251 plat/arm/board/tc/tc_rse_comms.c 252BL2_SOURCES += ${RSE_COMMS_SOURCES} \ 253 plat/arm/board/tc/tc_rse_comms.c 254BL31_SOURCES += ${RSE_COMMS_SOURCES} \ 255 plat/arm/board/tc/tc_rse_comms.c \ 256 lib/psa/rse_platform.c 257 258# Include Measured Boot makefile before any Crypto library makefile. 259# Crypto library makefile may need default definitions of Measured Boot build 260# flags present in Measured Boot makefile. 261ifeq (${MEASURED_BOOT},1) 262 ifeq (${DICE_PROTECTION_ENVIRONMENT},1) 263 $(info Including qcbor.mk) 264 include drivers/measured_boot/rse/qcbor.mk 265 $(info Including dice_prot_env.mk) 266 include drivers/measured_boot/rse/dice_prot_env.mk 267 268 BL1_SOURCES += ${QCBOR_SOURCES} \ 269 ${DPE_SOURCES} \ 270 plat/arm/board/tc/tc_common_dpe.c \ 271 plat/arm/board/tc/tc_bl1_dpe.c \ 272 lib/psa/dice_protection_environment.c \ 273 drivers/arm/css/sds/sds.c \ 274 drivers/delay_timer/delay_timer.c \ 275 drivers/delay_timer/generic_delay_timer.c 276 277 BL2_SOURCES += ${QCBOR_SOURCES} \ 278 ${DPE_SOURCES} \ 279 plat/arm/board/tc/tc_common_dpe.c \ 280 plat/arm/board/tc/tc_bl2_dpe.c \ 281 lib/psa/dice_protection_environment.c 282 283 PLAT_INCLUDES += -I${QCBOR_INCLUDES} \ 284 -Iinclude/lib/dice 285 else 286 $(info Including rse_measured_boot.mk) 287 include drivers/measured_boot/rse/rse_measured_boot.mk 288 289 BL1_SOURCES += ${MEASURED_BOOT_SOURCES} \ 290 plat/arm/board/tc/tc_common_measured_boot.c \ 291 plat/arm/board/tc/tc_bl1_measured_boot.c \ 292 lib/psa/measured_boot.c 293 294 BL2_SOURCES += ${MEASURED_BOOT_SOURCES} \ 295 plat/arm/board/tc/tc_common_measured_boot.c \ 296 plat/arm/board/tc/tc_bl2_measured_boot.c \ 297 lib/psa/measured_boot.c 298 endif 299endif 300 301BL31_SOURCES += plat/arm/board/tc/tc_trng.c 302 303ifneq (${ENABLE_FEAT_RNG_TRAP},0) 304 BL31_SOURCES += plat/arm/board/tc/tc_rng_trap.c 305endif 306 307ifneq (${PLATFORM_TEST},) 308 # Add this include as first, before arm_common.mk. This is necessary 309 # because arm_common.mk builds Mbed TLS, and platform_test.mk can 310 # change the list of Mbed TLS files that are to be compiled 311 # (LIBMBEDTLS_SRCS). 312 include plat/arm/board/tc/platform_test.mk 313endif 314 315 316include plat/arm/common/arm_common.mk 317include plat/arm/css/common/css_common.mk 318include plat/arm/board/common/board_common.mk 319