1# Copyright (c) 2021-2025, Arm Limited. All rights reserved. 2# 3# SPDX-License-Identifier: BSD-3-Clause 4# 5 6include common/fdt_wrappers.mk 7 8TARGET_FLAVOUR := fvp 9# DPU with SCMI may not necessarily work, so allow its independence 10TC_DPU_USE_SCMI_CLK := 1 11# SCMI power domain control enable 12TC_SCMI_PD_CTRL_EN := 1 13 14# System setup 15CSS_USE_SCMI_SDS_DRIVER := 1 16HW_ASSISTED_COHERENCY := 1 17USE_COHERENT_MEM := 0 18USE_GIC_DRIVER := 3 19GIC_ENABLE_V4_EXTN := 1 20GICV3_SUPPORT_GIC600 := 1 21override NEED_BL2U := no 22override ARM_PLAT_MT := 1 23 24# CPU setup 25ARM_ARCH_MINOR := 7 26BRANCH_PROTECTION := 1 27ENABLE_FEAT_MPAM := 1 # default is 2, optimise 28ENABLE_SVE_FOR_NS := 2 # to show we use it 29ENABLE_SVE_FOR_SWD := 1 30ENABLE_SME_FOR_NS := 2 31ENABLE_SME2_FOR_NS := 2 32ENABLE_SME_FOR_SWD := 1 33ENABLE_TRBE_FOR_NS := 1 34ENABLE_SYS_REG_TRACE_FOR_NS := 1 35ENABLE_FEAT_AMU := 1 36ENABLE_AMU_AUXILIARY_COUNTERS := 1 37ENABLE_MPMM := 1 38ENABLE_FEAT_MTE2 := 2 39ENABLE_SPE_FOR_NS := 2 40ENABLE_FEAT_TCR2 := 2 41 42ifneq ($(filter ${TARGET_PLATFORM}, 3),) 43ENABLE_FEAT_RNG_TRAP := 0 44else 45ENABLE_FEAT_RNG_TRAP := 1 46endif 47 48CTX_INCLUDE_AARCH32_REGS := 0 49 50ifeq (${SPD},spmd) 51 SPMD_SPM_AT_SEL2 := 1 52 CTX_INCLUDE_PAUTH_REGS := 1 53endif 54 55TRNG_SUPPORT := 1 56 57# TC RESOLUTION - LIST OF VALID OPTIONS (this impacts only FVP) 58TC_RESOLUTION_OPTIONS := 640x480p60 \ 59 1920x1080p60 60# Set default to the 640x480p60 resolution mode 61TC_RESOLUTION ?= $(firstword $(TC_RESOLUTION_OPTIONS)) 62 63# Check resolution option for FVP 64ifneq ($(filter ${TARGET_FLAVOUR}, fvp),) 65ifeq ($(filter ${TC_RESOLUTION}, ${TC_RESOLUTION_OPTIONS}),) 66 $(error TC_RESOLUTION is ${TC_RESOLUTION}, it must be: ${TC_RESOLUTION_OPTIONS}) 67endif 68endif 69 70ifneq ($(shell expr $(TARGET_PLATFORM) \<= 1), 0) 71 $(error Platform ${PLAT}$(TARGET_PLATFORM) is no longer available.) 72endif 73 74ifneq ($(shell expr $(TARGET_PLATFORM) = 2), 0) 75 $(warning Platform ${PLAT}$(TARGET_PLATFORM) is deprecated. \ 76 Some of the features might not work as expected) 77endif 78 79ifeq ($(shell expr $(TARGET_PLATFORM) \<= 4), 0) 80 $(error TARGET_PLATFORM must be less than or equal to 4) 81endif 82 83ifeq ($(filter ${TARGET_FLAVOUR}, fvp fpga),) 84 $(error TARGET_FLAVOUR must be fvp or fpga) 85endif 86 87# Support for loading FS Image to DRAM 88TC_FPGA_FS_IMG_IN_RAM := 0 89 90# Support Loading of FIP image to DRAM 91TC_FPGA_FIP_IMG_IN_RAM := 0 92 93# Use simple panel instead of vencoder with DPU 94TC_DPU_USE_SIMPLE_PANEL := 0 95 96$(eval $(call add_defines, \ 97 TARGET_PLATFORM \ 98 TARGET_FLAVOUR_$(call uppercase,${TARGET_FLAVOUR}) \ 99 TC_RESOLUTION_$(call uppercase,${TC_RESOLUTION}) \ 100 TC_DPU_USE_SCMI_CLK \ 101 TC_SCMI_PD_CTRL_EN \ 102 TC_FPGA_FS_IMG_IN_RAM \ 103 TC_FPGA_FIP_IMG_IN_RAM \ 104 TC_DPU_USE_SIMPLE_PANEL \ 105)) 106 107CSS_LOAD_SCP_IMAGES := 1 108 109# Save DSU PMU registers on cluster off and restore them on cluster on 110PRESERVE_DSU_PMU_REGS := 1 111 112# Specify MHU type based on platform 113ifneq ($(filter ${TARGET_PLATFORM}, 2),) 114 PLAT_MHU := MHUv2 115else 116 PLAT_MHU := MHUv3 117endif 118 119TC_BASE = plat/arm/board/tc 120 121PLAT_INCLUDES += -I${TC_BASE}/include/ \ 122 -I${TC_BASE}/fdts/ 123 124# CPU libraries for TARGET_PLATFORM=1 125ifeq (${TARGET_PLATFORM}, 1) 126TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a510.S \ 127 lib/cpus/aarch64/cortex_a715.S \ 128 lib/cpus/aarch64/cortex_x3.S 129endif 130 131# CPU libraries for TARGET_PLATFORM=2 132ifeq (${TARGET_PLATFORM}, 2) 133ERRATA_A520_2938996 := 1 134ERRATA_X4_2726228 := 1 135 136TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a520.S \ 137 lib/cpus/aarch64/cortex_a720.S \ 138 lib/cpus/aarch64/cortex_x4.S 139endif 140 141# CPU libraries for TARGET_PLATFORM=3 142ifeq (${TARGET_PLATFORM}, 3) 143ERRATA_A520_2938996 := 1 144 145TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a520.S \ 146 lib/cpus/aarch64/cortex_a725.S \ 147 lib/cpus/aarch64/cortex_x925.S 148endif 149 150# CPU libraries for TARGET_PLATFORM=4 151ifeq (${TARGET_PLATFORM}, 4) 152FEAT_PABANDON := 1 153# prevent CME related wakups 154ERRATA_SME_POWER_DOWN := 1 155TC_CPU_SOURCES += lib/cpus/aarch64/cortex_gelas.S \ 156 lib/cpus/aarch64/nevis.S \ 157 lib/cpus/aarch64/travis.S 158endif 159 160INTERCONNECT_SOURCES := ${TC_BASE}/tc_interconnect.c \ 161 plat/arm/common/arm_ni.c 162 163PLAT_BL_COMMON_SOURCES += ${TC_BASE}/tc_plat.c \ 164 ${TC_BASE}/include/tc_helpers.S 165 166 167ifneq (${ENABLE_STACK_PROTECTOR},0) 168PLAT_BL_COMMON_SOURCES += ${TC_BASE}/tc_stack_protector.c 169endif 170 171BL1_SOURCES += ${INTERCONNECT_SOURCES} \ 172 ${TC_CPU_SOURCES} \ 173 ${TC_BASE}/tc_trusted_boot.c \ 174 ${TC_BASE}/tc_bl1_setup.c \ 175 ${TC_BASE}/tc_err.c \ 176 drivers/arm/sbsa/sbsa.c 177 178BL2_SOURCES += ${TC_BASE}/tc_security.c \ 179 ${TC_BASE}/tc_err.c \ 180 ${TC_BASE}/tc_trusted_boot.c \ 181 ${TC_BASE}/tc_bl2_setup.c \ 182 lib/utils/mem_region.c \ 183 drivers/arm/tzc/tzc400.c \ 184 plat/arm/common/arm_nor_psci_mem_protect.c 185 186ifeq ($(shell test $(TARGET_PLATFORM) -le 2; echo $$?),0) 187BL2_SOURCES += plat/arm/common/arm_tzc400.c 188endif 189 190BL31_SOURCES += ${INTERCONNECT_SOURCES} \ 191 ${TC_CPU_SOURCES} \ 192 ${TC_BASE}/tc_bl31_setup.c \ 193 ${TC_BASE}/tc_topology.c \ 194 lib/fconf/fconf.c \ 195 lib/fconf/fconf_dyn_cfg_getter.c \ 196 drivers/arm/css/dsu/dsu.c \ 197 drivers/cfi/v2m/v2m_flash.c \ 198 lib/utils/mem_region.c \ 199 plat/arm/common/arm_nor_psci_mem_protect.c \ 200 drivers/arm/sbsa/sbsa.c 201 202BL31_SOURCES += ${FDT_WRAPPERS_SOURCES} 203 204# Add the FDT_SOURCES and options for Dynamic Config 205FDT_SOURCES += ${TC_BASE}/fdts/${PLAT}_fw_config.dts \ 206 ${TC_BASE}/fdts/${PLAT}_tb_fw_config.dts \ 207 ${TC_BASE}/fdts/${PLAT}_nt_fw_config.dts 208FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb 209TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb 210FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb 211 212# Add the FW_CONFIG to FIP and specify the same to certtool 213$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG})) 214# Add the TB_FW_CONFIG to FIP and specify the same to certtool 215$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG})) 216# Add the NT_FW_CONFIG to FIP and specify the same to certtool 217$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config,${FVP_NT_FW_CONFIG})) 218 219ifeq (${SPD},spmd) 220ifeq ($(ARM_SPMC_MANIFEST_DTS),) 221ARM_SPMC_MANIFEST_DTS := ${TC_BASE}/fdts/${PLAT}_spmc_test_manifest.dts 222endif 223 224FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS} 225TC_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_SPMC_MANIFEST_DTS})).dtb 226 227# Add the TOS_FW_CONFIG to FIP and specify the same to certtool 228$(eval $(call TOOL_ADD_PAYLOAD,${TC_TOS_FW_CONFIG},--tos-fw-config,${TC_TOS_FW_CONFIG})) 229endif 230 231#Device tree 232TC_HW_CONFIG_DTS := fdts/${PLAT}${TARGET_PLATFORM}.dts 233TC_HW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}.dtb 234FDT_SOURCES += ${TC_HW_CONFIG_DTS} 235$(eval TC_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(TC_HW_CONFIG_DTS))) 236 237# Add the HW_CONFIG to FIP and specify the same to certtool 238$(eval $(call TOOL_ADD_PAYLOAD,${TC_HW_CONFIG},--hw-config,${TC_HW_CONFIG})) 239 240$(info Including rse_comms.mk) 241include drivers/arm/rse/rse_comms.mk 242 243BL1_SOURCES += ${RSE_COMMS_SOURCES} \ 244 plat/arm/board/tc/tc_rse_comms.c 245BL2_SOURCES += ${RSE_COMMS_SOURCES} \ 246 plat/arm/board/tc/tc_rse_comms.c 247BL31_SOURCES += ${RSE_COMMS_SOURCES} \ 248 plat/arm/board/tc/tc_rse_comms.c \ 249 lib/psa/rse_platform.c 250 251# Include Measured Boot makefile before any Crypto library makefile. 252# Crypto library makefile may need default definitions of Measured Boot build 253# flags present in Measured Boot makefile. 254ifeq (${MEASURED_BOOT},1) 255 ifeq (${DICE_PROTECTION_ENVIRONMENT},1) 256 $(info Including qcbor.mk) 257 include drivers/measured_boot/rse/qcbor.mk 258 $(info Including dice_prot_env.mk) 259 include drivers/measured_boot/rse/dice_prot_env.mk 260 261 BL1_SOURCES += ${QCBOR_SOURCES} \ 262 ${DPE_SOURCES} \ 263 plat/arm/board/tc/tc_common_dpe.c \ 264 plat/arm/board/tc/tc_bl1_dpe.c \ 265 lib/psa/dice_protection_environment.c \ 266 drivers/arm/css/sds/sds.c \ 267 drivers/delay_timer/delay_timer.c \ 268 drivers/delay_timer/generic_delay_timer.c 269 270 BL2_SOURCES += ${QCBOR_SOURCES} \ 271 ${DPE_SOURCES} \ 272 plat/arm/board/tc/tc_common_dpe.c \ 273 plat/arm/board/tc/tc_bl2_dpe.c \ 274 lib/psa/dice_protection_environment.c 275 276 PLAT_INCLUDES += -I${QCBOR_INCLUDES} \ 277 -Iinclude/lib/dice 278 else 279 $(info Including rse_measured_boot.mk) 280 include drivers/measured_boot/rse/rse_measured_boot.mk 281 282 BL1_SOURCES += ${MEASURED_BOOT_SOURCES} \ 283 plat/arm/board/tc/tc_common_measured_boot.c \ 284 plat/arm/board/tc/tc_bl1_measured_boot.c \ 285 lib/psa/measured_boot.c 286 287 BL2_SOURCES += ${MEASURED_BOOT_SOURCES} \ 288 plat/arm/board/tc/tc_common_measured_boot.c \ 289 plat/arm/board/tc/tc_bl2_measured_boot.c \ 290 lib/psa/measured_boot.c 291 endif 292endif 293 294BL31_SOURCES += plat/arm/board/tc/tc_trng.c 295 296ifneq (${ENABLE_FEAT_RNG_TRAP},0) 297 BL31_SOURCES += plat/arm/board/tc/tc_rng_trap.c 298endif 299 300ifneq (${PLATFORM_TEST},) 301 # Add this include as first, before arm_common.mk. This is necessary 302 # because arm_common.mk builds Mbed TLS, and platform_test.mk can 303 # change the list of Mbed TLS files that are to be compiled 304 # (LIBMBEDTLS_SRCS). 305 include plat/arm/board/tc/platform_test.mk 306endif 307 308 309include plat/arm/common/arm_common.mk 310include plat/arm/css/common/css_common.mk 311include plat/arm/board/common/board_common.mk 312