16ec0c65bSUsama Arif# Copyright (c) 2021, Arm Limited. All rights reserved. 26ec0c65bSUsama Arif# 36ec0c65bSUsama Arif# SPDX-License-Identifier: BSD-3-Clause 46ec0c65bSUsama Arif# 56ec0c65bSUsama Arif 61fa05dabSChris Kayinclude common/fdt_wrappers.mk 71fa05dabSChris Kay 86ec0c65bSUsama Arififeq ($(filter ${TARGET_PLATFORM}, 0 1),) 96ec0c65bSUsama Arif $(error TARGET_PLATFORM must be 0 or 1) 106ec0c65bSUsama Arifendif 116ec0c65bSUsama Arif 126ec0c65bSUsama ArifCSS_LOAD_SCP_IMAGES := 1 136ec0c65bSUsama Arif 146ec0c65bSUsama ArifCSS_USE_SCMI_SDS_DRIVER := 1 156ec0c65bSUsama Arif 166ec0c65bSUsama ArifRAS_EXTENSION := 0 176ec0c65bSUsama Arif 186ec0c65bSUsama ArifSDEI_SUPPORT := 0 196ec0c65bSUsama Arif 206ec0c65bSUsama ArifEL3_EXCEPTION_HANDLING := 0 216ec0c65bSUsama Arif 226ec0c65bSUsama ArifHANDLE_EA_EL3_FIRST := 0 236ec0c65bSUsama Arif 246ec0c65bSUsama Arif# System coherency is managed in hardware 256ec0c65bSUsama ArifHW_ASSISTED_COHERENCY := 1 266ec0c65bSUsama Arif 276ec0c65bSUsama Arif# When building for systems with hardware-assisted coherency, there's no need to 286ec0c65bSUsama Arif# use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too. 296ec0c65bSUsama ArifUSE_COHERENT_MEM := 0 306ec0c65bSUsama Arif 316ec0c65bSUsama ArifGIC_ENABLE_V4_EXTN := 1 326ec0c65bSUsama Arif 336ec0c65bSUsama Arif# GIC-600 configuration 346ec0c65bSUsama ArifGICV3_SUPPORT_GIC600 := 1 356ec0c65bSUsama Arif 3610198eabSUsama Arif# Enable SVE 3710198eabSUsama ArifENABLE_SVE_FOR_NS := 1 3810198eabSUsama ArifENABLE_SVE_FOR_SWD := 1 396ec0c65bSUsama Arif 40*59da207eSDavidson K# enable trace buffer control registers access to NS by default 41*59da207eSDavidson KENABLE_TRBE_FOR_NS := 1 42*59da207eSDavidson K 43*59da207eSDavidson K# enable trace system registers access to NS by default 44*59da207eSDavidson KENABLE_SYS_REG_TRACE_FOR_NS := 1 45*59da207eSDavidson K 46*59da207eSDavidson K# enable trace filter control registers access to NS by default 47*59da207eSDavidson KENABLE_TRF_FOR_NS := 1 48*59da207eSDavidson K 496ec0c65bSUsama Arif# Include GICv3 driver files 506ec0c65bSUsama Arifinclude drivers/arm/gic/v3/gicv3.mk 516ec0c65bSUsama Arif 526ec0c65bSUsama ArifENT_GIC_SOURCES := ${GICV3_SOURCES} \ 536ec0c65bSUsama Arif plat/common/plat_gicv3.c \ 546ec0c65bSUsama Arif plat/arm/common/arm_gicv3.c 556ec0c65bSUsama Arif 566ec0c65bSUsama Arifoverride NEED_BL2U := no 576ec0c65bSUsama Arif 586ec0c65bSUsama Arifoverride ARM_PLAT_MT := 1 596ec0c65bSUsama Arif 606ec0c65bSUsama ArifTC_BASE = plat/arm/board/tc 616ec0c65bSUsama Arif 626ec0c65bSUsama ArifPLAT_INCLUDES += -I${TC_BASE}/include/ 636ec0c65bSUsama Arif 646ec0c65bSUsama Arif# Common CPU libraries 656ec0c65bSUsama ArifTC_CPU_SOURCES := lib/cpus/aarch64/cortex_a510.S 666ec0c65bSUsama Arif 676ec0c65bSUsama Arif# CPU libraries for TARGET_PLATFORM=0 686ec0c65bSUsama Arififeq (${TARGET_PLATFORM}, 0) 696ec0c65bSUsama ArifTC_CPU_SOURCES += lib/cpus/aarch64/cortex_a710.S \ 706ec0c65bSUsama Arif lib/cpus/aarch64/cortex_x2.S 716ec0c65bSUsama Arifendif 726ec0c65bSUsama Arif 736ec0c65bSUsama Arif# CPU libraries for TARGET_PLATFORM=1 746ec0c65bSUsama Arififeq (${TARGET_PLATFORM}, 1) 756ec0c65bSUsama ArifTC_CPU_SOURCES += lib/cpus/aarch64/cortex_makalu.S \ 766ec0c65bSUsama Arif lib/cpus/aarch64/cortex_makalu_elp_arm.S 776ec0c65bSUsama Arifendif 786ec0c65bSUsama Arif 796ec0c65bSUsama ArifINTERCONNECT_SOURCES := ${TC_BASE}/tc_interconnect.c 806ec0c65bSUsama Arif 816ec0c65bSUsama ArifPLAT_BL_COMMON_SOURCES += ${TC_BASE}/tc_plat.c \ 826ec0c65bSUsama Arif ${TC_BASE}/include/tc_helpers.S 836ec0c65bSUsama Arif 846ec0c65bSUsama ArifBL1_SOURCES += ${INTERCONNECT_SOURCES} \ 856ec0c65bSUsama Arif ${TC_CPU_SOURCES} \ 866ec0c65bSUsama Arif ${TC_BASE}/tc_trusted_boot.c \ 876ec0c65bSUsama Arif ${TC_BASE}/tc_err.c \ 886ec0c65bSUsama Arif drivers/arm/sbsa/sbsa.c 896ec0c65bSUsama Arif 906ec0c65bSUsama Arif 916ec0c65bSUsama ArifBL2_SOURCES += ${TC_BASE}/tc_security.c \ 926ec0c65bSUsama Arif ${TC_BASE}/tc_err.c \ 936ec0c65bSUsama Arif ${TC_BASE}/tc_trusted_boot.c \ 9434a87d74SUsama Arif ${TC_BASE}/tc_bl2_setup.c \ 956ec0c65bSUsama Arif lib/utils/mem_region.c \ 966ec0c65bSUsama Arif drivers/arm/tzc/tzc400.c \ 976ec0c65bSUsama Arif plat/arm/common/arm_tzc400.c \ 986ec0c65bSUsama Arif plat/arm/common/arm_nor_psci_mem_protect.c 996ec0c65bSUsama Arif 1006ec0c65bSUsama ArifBL31_SOURCES += ${INTERCONNECT_SOURCES} \ 1016ec0c65bSUsama Arif ${TC_CPU_SOURCES} \ 1026ec0c65bSUsama Arif ${ENT_GIC_SOURCES} \ 1036ec0c65bSUsama Arif ${TC_BASE}/tc_bl31_setup.c \ 1046ec0c65bSUsama Arif ${TC_BASE}/tc_topology.c \ 10534a87d74SUsama Arif lib/fconf/fconf.c \ 10634a87d74SUsama Arif lib/fconf/fconf_dyn_cfg_getter.c \ 1076ec0c65bSUsama Arif drivers/cfi/v2m/v2m_flash.c \ 1086ec0c65bSUsama Arif lib/utils/mem_region.c \ 1096ec0c65bSUsama Arif plat/arm/common/arm_nor_psci_mem_protect.c 1106ec0c65bSUsama Arif 1111fa05dabSChris KayBL31_SOURCES += ${FDT_WRAPPERS_SOURCES} 1121fa05dabSChris Kay 1136ec0c65bSUsama Arif# Add the FDT_SOURCES and options for Dynamic Config 1146ec0c65bSUsama ArifFDT_SOURCES += ${TC_BASE}/fdts/${PLAT}_fw_config.dts \ 1156ec0c65bSUsama Arif ${TC_BASE}/fdts/${PLAT}_tb_fw_config.dts 1166ec0c65bSUsama ArifFW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb 1176ec0c65bSUsama ArifTB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb 1186ec0c65bSUsama Arif 1196ec0c65bSUsama Arif# Add the FW_CONFIG to FIP and specify the same to certtool 1206ec0c65bSUsama Arif$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG})) 1216ec0c65bSUsama Arif# Add the TB_FW_CONFIG to FIP and specify the same to certtool 1226ec0c65bSUsama Arif$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG})) 1236ec0c65bSUsama Arif 1246ec0c65bSUsama Arififeq (${SPD},spmd) 1256ec0c65bSUsama Arififeq ($(ARM_SPMC_MANIFEST_DTS),) 1266ec0c65bSUsama ArifARM_SPMC_MANIFEST_DTS := ${TC_BASE}/fdts/${PLAT}_spmc_manifest.dts 1276ec0c65bSUsama Arifendif 1286ec0c65bSUsama Arif 1296ec0c65bSUsama ArifFDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS} 1306ec0c65bSUsama ArifTC_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_SPMC_MANIFEST_DTS})).dtb 1316ec0c65bSUsama Arif 1326ec0c65bSUsama Arif# Add the TOS_FW_CONFIG to FIP and specify the same to certtool 1336ec0c65bSUsama Arif$(eval $(call TOOL_ADD_PAYLOAD,${TC_TOS_FW_CONFIG},--tos-fw-config,${TC_TOS_FW_CONFIG})) 1346ec0c65bSUsama Arifendif 1356ec0c65bSUsama Arif 1366ec0c65bSUsama Arif#Device tree 1376ec0c65bSUsama ArifTC_HW_CONFIG_DTS := fdts/tc.dts 1386ec0c65bSUsama ArifTC_HW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}.dtb 1396ec0c65bSUsama ArifFDT_SOURCES += ${TC_HW_CONFIG_DTS} 1406ec0c65bSUsama Arif$(eval TC_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(TC_HW_CONFIG_DTS))) 1416ec0c65bSUsama Arif 1426ec0c65bSUsama Arif# Add the HW_CONFIG to FIP and specify the same to certtool 1436ec0c65bSUsama Arif$(eval $(call TOOL_ADD_PAYLOAD,${TC_HW_CONFIG},--hw-config,${TC_HW_CONFIG})) 1446ec0c65bSUsama Arif 1456ec0c65bSUsama Arifoverride CTX_INCLUDE_AARCH32_REGS := 0 1466ec0c65bSUsama Arif 1476ec0c65bSUsama Arifoverride CTX_INCLUDE_PAUTH_REGS := 1 1486ec0c65bSUsama Arif 1496ec0c65bSUsama Arifoverride ENABLE_SPE_FOR_LOWER_ELS := 0 1506ec0c65bSUsama Arif 1516ec0c65bSUsama Arifoverride ENABLE_AMU := 1 152c19a82beSChris Kayoverride ENABLE_AMU_AUXILIARY_COUNTERS := 1 153c19a82beSChris Kayoverride ENABLE_AMU_FCONF := 1 154c19a82beSChris Kay 155c19a82beSChris Kayoverride ENABLE_MPMM := 1 156c19a82beSChris Kayoverride ENABLE_MPMM_FCONF := 1 1576ec0c65bSUsama Arif 1586ec0c65bSUsama Arifinclude plat/arm/common/arm_common.mk 1596ec0c65bSUsama Arifinclude plat/arm/css/common/css_common.mk 1606ec0c65bSUsama Arifinclude plat/arm/soc/common/soc_css.mk 1616ec0c65bSUsama Arifinclude plat/arm/board/common/board_common.mk 162