xref: /rk3399_ARM-atf/plat/arm/board/tc/include/tc_helpers.S (revision 3960bcda2b2d5bea956b04604afd446c2ca14510)
16ec0c65bSUsama Arif/*
2*3960bcdaSJagdish Gediya * Copyright (c) 2024, ARM Limited and Contributors. All rights reserved.
36ec0c65bSUsama Arif *
46ec0c65bSUsama Arif * SPDX-License-Identifier: BSD-3-Clause
56ec0c65bSUsama Arif */
66ec0c65bSUsama Arif
76ec0c65bSUsama Arif#include <arch.h>
86ec0c65bSUsama Arif#include <asm_macros.S>
96ec0c65bSUsama Arif#include <platform_def.h>
106ec0c65bSUsama Arif#include <cpu_macros.S>
116ec0c65bSUsama Arif
126ec0c65bSUsama Arif	.globl	plat_arm_calc_core_pos
136ec0c65bSUsama Arif	.globl	plat_reset_handler
146ec0c65bSUsama Arif
156ec0c65bSUsama Arif	/* ---------------------------------------------------------------------
166ec0c65bSUsama Arif	 * unsigned int plat_arm_calc_core_pos(u_register_t mpidr)
176ec0c65bSUsama Arif	 *
186ec0c65bSUsama Arif	 * Function to calculate the core position on TC.
196ec0c65bSUsama Arif	 *
206ec0c65bSUsama Arif	 * (ClusterId * PLAT_MAX_CPUS_PER_CLUSTER * PLAT_MAX_PE_PER_CPU) +
216ec0c65bSUsama Arif	 * (CPUId * PLAT_MAX_PE_PER_CPU) +
226ec0c65bSUsama Arif	 * ThreadId
236ec0c65bSUsama Arif	 *
246ec0c65bSUsama Arif	 * which can be simplified as:
256ec0c65bSUsama Arif	 *
266ec0c65bSUsama Arif	 * ((ClusterId * PLAT_MAX_CPUS_PER_CLUSTER + CPUId) * PLAT_MAX_PE_PER_CPU)
276ec0c65bSUsama Arif	 * + ThreadId
286ec0c65bSUsama Arif	 * ---------------------------------------------------------------------
296ec0c65bSUsama Arif	 */
306ec0c65bSUsama Ariffunc plat_arm_calc_core_pos
316ec0c65bSUsama Arif	/*
326ec0c65bSUsama Arif	 * Check for MT bit in MPIDR. If not set, shift MPIDR to left to make it
336ec0c65bSUsama Arif	 * look as if in a multi-threaded implementation.
346ec0c65bSUsama Arif	 */
356ec0c65bSUsama Arif	tst	x0, #MPIDR_MT_MASK
366ec0c65bSUsama Arif	lsl	x3, x0, #MPIDR_AFFINITY_BITS
376ec0c65bSUsama Arif	csel	x3, x3, x0, eq
386ec0c65bSUsama Arif
396ec0c65bSUsama Arif	/* Extract individual affinity fields from MPIDR */
406ec0c65bSUsama Arif	ubfx	x0, x3, #MPIDR_AFF0_SHIFT, #MPIDR_AFFINITY_BITS
416ec0c65bSUsama Arif	ubfx	x1, x3, #MPIDR_AFF1_SHIFT, #MPIDR_AFFINITY_BITS
426ec0c65bSUsama Arif	ubfx	x2, x3, #MPIDR_AFF2_SHIFT, #MPIDR_AFFINITY_BITS
436ec0c65bSUsama Arif
446ec0c65bSUsama Arif	/* Compute linear position */
456ec0c65bSUsama Arif	mov	x4, #PLAT_MAX_CPUS_PER_CLUSTER
466ec0c65bSUsama Arif	madd	x1, x2, x4, x1
476ec0c65bSUsama Arif	mov	x5, #PLAT_MAX_PE_PER_CPU
486ec0c65bSUsama Arif	madd	x0, x1, x5, x0
496ec0c65bSUsama Arif	ret
506ec0c65bSUsama Arifendfunc plat_arm_calc_core_pos
516ec0c65bSUsama Arif
526ec0c65bSUsama Arif	/* -----------------------------------------------------
536ec0c65bSUsama Arif	 * void plat_reset_handler(void);
546ec0c65bSUsama Arif	 * -----------------------------------------------------
556ec0c65bSUsama Arif	 */
566ec0c65bSUsama Ariffunc plat_reset_handler
576ec0c65bSUsama Arif	ret
586ec0c65bSUsama Arifendfunc plat_reset_handler
59