1/* 2 * Copyright (c) 2020-2024, Arm Limited. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6/ { 7 compatible = "arm,ffa-core-manifest-1.0"; 8 #address-cells = <2>; 9 #size-cells = <2>; 10 11 attribute { 12 spmc_id = <0x8000>; 13 maj_ver = <0x1>; 14 min_ver = <0x2>; 15 exec_state = <0x0>; 16 load_address = <0x0 0xfd000000>; 17 entrypoint = <0x0 0xfd000000>; 18 binary_size = <0x80000>; 19 }; 20 21 hafnium:hypervisor { 22 compatible = "hafnium,hafnium"; 23 /* filled in in top level .dts */ 24 }; 25 26 cpus { 27 #address-cells = <0x2>; 28 #size-cells = <0x0>; 29 30 CPU0:cpu@0 { 31 device_type = "cpu"; 32 compatible = "arm,armv8"; 33 reg = <0x0 0x0>; 34 enable-method = "psci"; 35 }; 36 37 /* 38 * SPMC (Hafnium) requires secondary cpu nodes are declared in 39 * descending order 40 */ 41 CPU7:cpu@700 { 42 device_type = "cpu"; 43 compatible = "arm,armv8"; 44 reg = <0x0 0x700>; 45 enable-method = "psci"; 46 }; 47 48 CPU6:cpu@600 { 49 device_type = "cpu"; 50 compatible = "arm,armv8"; 51 reg = <0x0 0x600>; 52 enable-method = "psci"; 53 }; 54 55 CPU5:cpu@500 { 56 device_type = "cpu"; 57 compatible = "arm,armv8"; 58 reg = <0x0 0x500>; 59 enable-method = "psci"; 60 }; 61 62 CPU4:cpu@400 { 63 device_type = "cpu"; 64 compatible = "arm,armv8"; 65 reg = <0x0 0x400>; 66 enable-method = "psci"; 67 }; 68 69 CPU3:cpu@300 { 70 device_type = "cpu"; 71 compatible = "arm,armv8"; 72 reg = <0x0 0x300>; 73 enable-method = "psci"; 74 }; 75 76 CPU2:cpu@200 { 77 device_type = "cpu"; 78 compatible = "arm,armv8"; 79 reg = <0x0 0x200>; 80 enable-method = "psci"; 81 }; 82 83 CPU1:cpu@100 { 84 device_type = "cpu"; 85 compatible = "arm,armv8"; 86 reg = <0x0 0x100>; 87 enable-method = "psci"; 88 }; 89 }; 90 91 memory@0 { 92 device_type = "memory"; 93 reg = <0x0 0xf9000000 0x0 0x6000000>, 94 <0x0 0xff000000 0x0 0x1000000>; 95 }; 96 97 memory@1 { 98 device_type = "ns-memory"; 99 reg = <0x0 0x80000000 0x0 0x79000000>, 100 <0x80 0x80000000 0x1 0x80000000>; 101 }; 102}; 103