1# 2# Copyright (c) 2018-2025, Arm Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7CSS_USE_SCMI_SDS_DRIVER := 1 8 9NRD_COMMON_BASE := plat/arm/board/neoverse_rd/common 10 11ENABLE_FEAT_RAS := 1 12 13SDEI_SUPPORT := 0 14 15EL3_EXCEPTION_HANDLING := 0 16 17HANDLE_EA_EL3_FIRST_NS := 0 18 19NRD_CHIP_COUNT := 1 20 21NRD_PLATFORM_VARIANT := 0 22 23# Do not enable SVE 24ENABLE_SVE_FOR_NS := 0 25 26CTX_INCLUDE_FPREGS := 1 27 28INTERCONNECT_SOURCES := ${NRD_COMMON_BASE}/nrd_interconnect.c 29 30PLAT_INCLUDES += -I${NRD_COMMON_BASE}/include 31 32# GIC-600 configuration 33USE_GIC_DRIVER := 3 34GICV3_SUPPORT_GIC600 := 1 35 36PLAT_BL_COMMON_SOURCES += ${NRD_COMMON_BASE}/arch/aarch64/nrd_helper.S 37 38BL1_SOURCES += ${INTERCONNECT_SOURCES} \ 39 ${NRD_COMMON_BASE}/nrd_bl1_setup.c \ 40 drivers/arm/sbsa/sbsa.c 41 42BL2_SOURCES += ${NRD_COMMON_BASE}/nrd_image_load.c \ 43 drivers/arm/css/sds/sds.c 44 45BL31_SOURCES += ${INTERCONNECT_SOURCES} \ 46 ${NRD_COMMON_BASE}/nrd_bl31_setup.c \ 47 ${NRD_COMMON_BASE}/nrd_topology.c \ 48 drivers/delay_timer/generic_delay_timer.c 49 50$(eval $(call add_define,NRD_CHIP_COUNT)) 51 52$(eval $(call add_define,NRD_PLATFORM_VARIANT)) 53 54override CSS_LOAD_SCP_IMAGES := 0 55override NEED_BL2U := no 56override ARM_PLAT_MT := 1 57override PSCI_EXTENDED_STATE_ID := 1 58override ARM_RECOM_STATE_ID_ENC := 1 59 60# System coherency is managed in hardware 61HW_ASSISTED_COHERENCY := 1 62 63# When building for systems with hardware-assisted coherency, there's no need to 64# use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too. 65USE_COHERENT_MEM := 0 66 67include plat/arm/common/arm_common.mk 68include plat/arm/css/common/css_common.mk 69include plat/arm/board/common/board_common.mk 70