1# 2# Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7 8N1SDP_BASE := plat/arm/board/n1sdp 9 10INTERCONNECT_SOURCES := ${N1SDP_BASE}/n1sdp_interconnect.c 11 12PLAT_INCLUDES := -I${N1SDP_BASE}/include 13 14 15N1SDP_CPU_SOURCES := lib/cpus/aarch64/cortex_ares.S 16 17 18N1SDP_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ 19 drivers/arm/gic/v3/gicv3_main.c \ 20 drivers/arm/gic/v3/gicv3_helpers.c \ 21 plat/common/plat_gicv3.c \ 22 plat/arm/common/arm_gicv3.c \ 23 drivers/arm/gic/v3/gic600.c 24 25PLAT_BL_COMMON_SOURCES := ${N1SDP_BASE}/n1sdp_plat.c \ 26 ${N1SDP_BASE}/aarch64/n1sdp_helper.S 27 28 29BL31_SOURCES := ${N1SDP_CPU_SOURCES} \ 30 ${INTERCONNECT_SOURCES} \ 31 ${N1SDP_GIC_SOURCES} \ 32 ${N1SDP_BASE}/n1sdp_bl31_setup.c \ 33 ${N1SDP_BASE}/n1sdp_topology.c \ 34 ${N1SDP_BASE}/n1sdp_security.c 35 36 37# TF-A not required to load the SCP Images 38override CSS_LOAD_SCP_IMAGES := 0 39 40# BL1/BL2 Image not a part of the capsule Image for n1sdp 41override NEED_BL1 := no 42override NEED_BL2 := no 43override NEED_BL2U := no 44 45#TFA for n1sdp starts from BL31 46override RESET_TO_BL31 := 1 47 48# 32 bit mode not supported 49override CTX_INCLUDE_AARCH32_REGS := 0 50 51override ARM_PLAT_MT := 1 52 53# Select SCMI/SDS drivers instead of SCPI/BOM driver for communicating with the 54# SCP during power management operations and for SCP RAM Firmware transfer. 55CSS_USE_SCMI_SDS_DRIVER := 1 56 57# System coherency is managed in hardware 58HW_ASSISTED_COHERENCY := 1 59 60# When building for systems with hardware-assisted coherency, there's no need to 61# use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too. 62USE_COHERENT_MEM := 0 63include plat/arm/common/arm_common.mk 64include plat/arm/css/common/css_common.mk 65include plat/arm/board/common/board_common.mk 66 67