180d37c28SDeepak Pandey# 2*da6d75a0SJohn Tsichritzis# Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved. 380d37c28SDeepak Pandey# 480d37c28SDeepak Pandey# SPDX-License-Identifier: BSD-3-Clause 580d37c28SDeepak Pandey# 680d37c28SDeepak Pandey 780d37c28SDeepak Pandey 880d37c28SDeepak PandeyN1SDP_BASE := plat/arm/board/n1sdp 980d37c28SDeepak Pandey 1080d37c28SDeepak PandeyINTERCONNECT_SOURCES := ${N1SDP_BASE}/n1sdp_interconnect.c 1180d37c28SDeepak Pandey 1280d37c28SDeepak PandeyPLAT_INCLUDES := -I${N1SDP_BASE}/include 1380d37c28SDeepak Pandey 1480d37c28SDeepak Pandey 15*da6d75a0SJohn TsichritzisN1SDP_CPU_SOURCES := lib/cpus/aarch64/neoverse_n1.S 1680d37c28SDeepak Pandey 1780d37c28SDeepak Pandey 1880d37c28SDeepak PandeyN1SDP_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ 1980d37c28SDeepak Pandey drivers/arm/gic/v3/gicv3_main.c \ 2080d37c28SDeepak Pandey drivers/arm/gic/v3/gicv3_helpers.c \ 2180d37c28SDeepak Pandey plat/common/plat_gicv3.c \ 2280d37c28SDeepak Pandey plat/arm/common/arm_gicv3.c \ 2380d37c28SDeepak Pandey drivers/arm/gic/v3/gic600.c 2480d37c28SDeepak Pandey 2580d37c28SDeepak PandeyPLAT_BL_COMMON_SOURCES := ${N1SDP_BASE}/n1sdp_plat.c \ 2680d37c28SDeepak Pandey ${N1SDP_BASE}/aarch64/n1sdp_helper.S 2780d37c28SDeepak Pandey 2880d37c28SDeepak Pandey 2980d37c28SDeepak PandeyBL31_SOURCES := ${N1SDP_CPU_SOURCES} \ 3080d37c28SDeepak Pandey ${INTERCONNECT_SOURCES} \ 3180d37c28SDeepak Pandey ${N1SDP_GIC_SOURCES} \ 3280d37c28SDeepak Pandey ${N1SDP_BASE}/n1sdp_bl31_setup.c \ 3380d37c28SDeepak Pandey ${N1SDP_BASE}/n1sdp_topology.c \ 3480d37c28SDeepak Pandey ${N1SDP_BASE}/n1sdp_security.c 3580d37c28SDeepak Pandey 3680d37c28SDeepak Pandey 3780d37c28SDeepak Pandey# TF-A not required to load the SCP Images 3880d37c28SDeepak Pandeyoverride CSS_LOAD_SCP_IMAGES := 0 3980d37c28SDeepak Pandey 4080d37c28SDeepak Pandey# BL1/BL2 Image not a part of the capsule Image for n1sdp 4180d37c28SDeepak Pandeyoverride NEED_BL1 := no 4280d37c28SDeepak Pandeyoverride NEED_BL2 := no 4380d37c28SDeepak Pandeyoverride NEED_BL2U := no 4480d37c28SDeepak Pandey 4580d37c28SDeepak Pandey#TFA for n1sdp starts from BL31 4680d37c28SDeepak Pandeyoverride RESET_TO_BL31 := 1 4780d37c28SDeepak Pandey 4880d37c28SDeepak Pandey# 32 bit mode not supported 4980d37c28SDeepak Pandeyoverride CTX_INCLUDE_AARCH32_REGS := 0 5080d37c28SDeepak Pandey 5180d37c28SDeepak Pandeyoverride ARM_PLAT_MT := 1 5280d37c28SDeepak Pandey 5380d37c28SDeepak Pandey# Select SCMI/SDS drivers instead of SCPI/BOM driver for communicating with the 5480d37c28SDeepak Pandey# SCP during power management operations and for SCP RAM Firmware transfer. 5580d37c28SDeepak PandeyCSS_USE_SCMI_SDS_DRIVER := 1 5680d37c28SDeepak Pandey 5780d37c28SDeepak Pandey# System coherency is managed in hardware 5880d37c28SDeepak PandeyHW_ASSISTED_COHERENCY := 1 5980d37c28SDeepak Pandey 6080d37c28SDeepak Pandey# When building for systems with hardware-assisted coherency, there's no need to 6180d37c28SDeepak Pandey# use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too. 6280d37c28SDeepak PandeyUSE_COHERENT_MEM := 0 6380d37c28SDeepak Pandeyinclude plat/arm/common/arm_common.mk 6480d37c28SDeepak Pandeyinclude plat/arm/css/common/css_common.mk 6580d37c28SDeepak Pandeyinclude plat/arm/board/common/board_common.mk 6680d37c28SDeepak Pandey 67