xref: /rk3399_ARM-atf/plat/arm/board/n1sdp/n1sdp_plat.c (revision 42d4d3baacb3b11c68163ec85de1bf2e34e0c882)
180d37c28SDeepak Pandey /*
2*42d4d3baSArvind Ram Prakash  * Copyright (c) 2018-2023, Arm Limited. All rights reserved.
380d37c28SDeepak Pandey  *
480d37c28SDeepak Pandey  * SPDX-License-Identifier: BSD-3-Clause
580d37c28SDeepak Pandey  */
680d37c28SDeepak Pandey 
7fe2b37f6Ssah01 #include <assert.h>
880d37c28SDeepak Pandey 
9b0c97dafSAditya Angadi #include <drivers/arm/sbsa.h>
10fe2b37f6Ssah01 #include <plat/arm/common/plat_arm.h>
1109d40e0eSAntonio Nino Diaz 
12de8bc83eSManoj Kumar #include "n1sdp_def.h"
13de8bc83eSManoj Kumar 
1480d37c28SDeepak Pandey /*
1580d37c28SDeepak Pandey  * Table of regions to map using the MMU.
1680d37c28SDeepak Pandey  * Replace or extend the below regions as required
1780d37c28SDeepak Pandey  */
1880d37c28SDeepak Pandey 
19fe2b37f6Ssah01 #if IMAGE_BL1
20fe2b37f6Ssah01 const mmap_region_t plat_arm_mmap[] = {
21fe2b37f6Ssah01 	ARM_MAP_SHARED_RAM,
22fe2b37f6Ssah01 	N1SDP_MAP_DEVICE,
23fe2b37f6Ssah01 	N1SDP_MAP_NS_SRAM,
24fe2b37f6Ssah01 	ARM_MAP_DRAM1,
25fe2b37f6Ssah01 	{0}
26fe2b37f6Ssah01 };
27fe2b37f6Ssah01 #endif
28fe2b37f6Ssah01 
29fe2b37f6Ssah01 #if IMAGE_BL2
3080d37c28SDeepak Pandey const mmap_region_t plat_arm_mmap[] = {
3180d37c28SDeepak Pandey 	ARM_MAP_SHARED_RAM,
3280d37c28SDeepak Pandey 	N1SDP_MAP_DEVICE,
33de8bc83eSManoj Kumar 	N1SDP_MAP_NS_SRAM,
34de8bc83eSManoj Kumar 	ARM_MAP_DRAM1,
35de8bc83eSManoj Kumar 	ARM_MAP_DRAM2,
36*42d4d3baSArvind Ram Prakash #if TRUSTED_BOARD_BOOT && !RESET_TO_BL2
37fe2b37f6Ssah01 	ARM_MAP_BL1_RW,
38fe2b37f6Ssah01 #endif
39fe2b37f6Ssah01 	{0}
40fe2b37f6Ssah01 };
41fe2b37f6Ssah01 #endif
42fe2b37f6Ssah01 
43fe2b37f6Ssah01 #if IMAGE_BL31
44fe2b37f6Ssah01 const mmap_region_t plat_arm_mmap[] = {
45fe2b37f6Ssah01 	ARM_MAP_SHARED_RAM,
46fe2b37f6Ssah01 	N1SDP_MAP_DEVICE,
47fe2b37f6Ssah01 	N1SDP_MAP_NS_SRAM,
48f91a8e4cSManish Pandey 	N1SDP_MAP_REMOTE_DEVICE,
49f91a8e4cSManish Pandey 	N1SDP_MAP_REMOTE_DRAM1,
50f91a8e4cSManish Pandey 	N1SDP_MAP_REMOTE_DRAM2,
5180d37c28SDeepak Pandey 	{0}
5280d37c28SDeepak Pandey };
53fe2b37f6Ssah01 #endif
54fe2b37f6Ssah01 
55fe2b37f6Ssah01 #if TRUSTED_BOARD_BOOT
56fe2b37f6Ssah01 int plat_get_mbedtls_heap(void **heap_addr, size_t *heap_size)
57fe2b37f6Ssah01 {
58fe2b37f6Ssah01 	assert(heap_addr != NULL);
59fe2b37f6Ssah01 	assert(heap_size != NULL);
60fe2b37f6Ssah01 
61fe2b37f6Ssah01 	return arm_get_mbedtls_heap(heap_addr, heap_size);
62fe2b37f6Ssah01 }
63fe2b37f6Ssah01 #endif
6480d37c28SDeepak Pandey 
65b0c97dafSAditya Angadi void plat_arm_secure_wdt_start(void)
66b0c97dafSAditya Angadi {
67b0c97dafSAditya Angadi 	sbsa_wdog_start(SBSA_SECURE_WDOG_BASE, SBSA_SECURE_WDOG_TIMEOUT);
68b0c97dafSAditya Angadi }
69b0c97dafSAditya Angadi 
70b0c97dafSAditya Angadi void plat_arm_secure_wdt_stop(void)
71b0c97dafSAditya Angadi {
72b0c97dafSAditya Angadi 	sbsa_wdog_stop(SBSA_SECURE_WDOG_BASE);
73b0c97dafSAditya Angadi }
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