1*9090fe00SVishnu Banavath/* 2*9090fe00SVishnu Banavath * Copyright (c) 2022 Arm Limited. All rights reserved. 3*9090fe00SVishnu Banavath * 4*9090fe00SVishnu Banavath * SPDX-License-Identifier: BSD-3-Clause 5*9090fe00SVishnu Banavath */ 6*9090fe00SVishnu Banavath/dts-v1/; 7*9090fe00SVishnu Banavath 8*9090fe00SVishnu Banavath/ { 9*9090fe00SVishnu Banavath compatible = "arm,ffa-core-manifest-1.0"; 10*9090fe00SVishnu Banavath #address-cells = <2>; 11*9090fe00SVishnu Banavath #size-cells = <1>; 12*9090fe00SVishnu Banavath 13*9090fe00SVishnu Banavath /* 14*9090fe00SVishnu Banavath * BL32 image details needed by SPMC 15*9090fe00SVishnu Banavath * 16*9090fe00SVishnu Banavath * Note: 17*9090fe00SVishnu Banavath * binary_size: size of BL32 + TOS_FW_CONFIG 18*9090fe00SVishnu Banavath */ 19*9090fe00SVishnu Banavath 20*9090fe00SVishnu Banavath attribute { 21*9090fe00SVishnu Banavath spmc_id = <0x8000>; 22*9090fe00SVishnu Banavath maj_ver = <0x1>; 23*9090fe00SVishnu Banavath min_ver = <0x0>; 24*9090fe00SVishnu Banavath exec_state = <0x0>; 25*9090fe00SVishnu Banavath load_address = <0x0 0x08000000>; 26*9090fe00SVishnu Banavath entrypoint = <0x0 0x08000000>; 27*9090fe00SVishnu Banavath binary_size = <0x2000000>; 28*9090fe00SVishnu Banavath }; 29*9090fe00SVishnu Banavath 30*9090fe00SVishnu Banavath}; 31