1# 2# Copyright (c) 2020-2025, Arm Limited. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7# Making sure the Morello platform type is specified 8ifeq ($(filter ${TARGET_PLATFORM}, fvp soc),) 9 $(error TARGET_PLATFORM must be fvp or soc) 10endif 11 12MORELLO_BASE := plat/arm/board/morello 13 14INTERCONNECT_SOURCES := ${MORELLO_BASE}/morello_interconnect.c 15 16PLAT_INCLUDES := -I${MORELLO_BASE}/include 17 18MORELLO_CPU_SOURCES := lib/cpus/aarch64/rainier.S 19 20# GIC-600 configuration 21USE_GIC_DRIVER := 3 22GICV3_SUPPORT_GIC600 := 1 23 24PLAT_BL_COMMON_SOURCES := ${MORELLO_BASE}/morello_plat.c \ 25 ${MORELLO_BASE}/aarch64/morello_helper.S 26 27BL1_SOURCES := ${MORELLO_CPU_SOURCES} \ 28 ${INTERCONNECT_SOURCES} \ 29 ${MORELLO_BASE}/morello_err.c \ 30 ${MORELLO_BASE}/morello_trusted_boot.c \ 31 ${MORELLO_BASE}/morello_bl1_setup.c \ 32 drivers/arm/sbsa/sbsa.c 33 34BL2_SOURCES := ${MORELLO_BASE}/morello_security.c \ 35 ${MORELLO_BASE}/morello_err.c \ 36 ${MORELLO_BASE}/morello_trusted_boot.c \ 37 ${MORELLO_BASE}/morello_bl2_setup.c \ 38 ${MORELLO_BASE}/morello_image_load.c \ 39 lib/utils/mem_region.c \ 40 drivers/arm/css/sds/sds.c 41 42BL31_SOURCES := ${MORELLO_CPU_SOURCES} \ 43 ${INTERCONNECT_SOURCES} \ 44 ${MORELLO_BASE}/morello_bl31_setup.c \ 45 ${MORELLO_BASE}/morello_pm.c \ 46 ${MORELLO_BASE}/morello_topology.c \ 47 ${MORELLO_BASE}/morello_security.c \ 48 drivers/arm/css/sds/sds.c 49 50FDT_SOURCES += fdts/morello-${TARGET_PLATFORM}.dts \ 51 ${MORELLO_BASE}/fdts/morello_fw_config.dts \ 52 ${MORELLO_BASE}/fdts/morello_tb_fw_config.dts \ 53 ${MORELLO_BASE}/fdts/morello_nt_fw_config.dts 54 55FW_CONFIG := ${BUILD_PLAT}/fdts/morello_fw_config.dtb 56HW_CONFIG := ${BUILD_PLAT}/fdts/morello-${TARGET_PLATFORM}.dtb 57TB_FW_CONFIG := ${BUILD_PLAT}/fdts/morello_tb_fw_config.dtb 58NT_FW_CONFIG := ${BUILD_PLAT}/fdts/morello_nt_fw_config.dtb 59 60# Add the FW_CONFIG to FIP and specify the same to certtool 61$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG})) 62# Add the HW_CONFIG to FIP and specify the same to certtool 63$(eval $(call TOOL_ADD_PAYLOAD,${HW_CONFIG},--hw-config,${HW_CONFIG})) 64# Add the TB_FW_CONFIG to FIP and specify the same to certtool 65$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG})) 66# Add the NT_FW_CONFIG to FIP and specify the same to certtool 67$(eval $(call TOOL_ADD_PAYLOAD,${NT_FW_CONFIG},--nt-fw-config,${NT_FW_CONFIG})) 68 69MORELLO_FW_NVCTR_VAL := 0 70TFW_NVCTR_VAL := ${MORELLO_FW_NVCTR_VAL} 71NTFW_NVCTR_VAL := ${MORELLO_FW_NVCTR_VAL} 72 73# TF-A not required to load the SCP Images 74override CSS_LOAD_SCP_IMAGES := 0 75 76override NEED_BL2U := no 77 78# 32 bit mode not supported 79override CTX_INCLUDE_AARCH32_REGS := 0 80 81override ARM_PLAT_MT := 1 82 83override ARM_BL31_IN_DRAM := 1 84 85override PSCI_EXTENDED_STATE_ID := 1 86override ARM_RECOM_STATE_ID_ENC := 1 87 88# Errata workarounds: 89ERRATA_N1_1868343 := 1 90 91# Select SCMI/SDS drivers instead of SCPI/BOM driver for communicating with the 92# SCP during power management operations and for SCP RAM Firmware transfer. 93CSS_USE_SCMI_SDS_DRIVER := 1 94 95# System coherency is managed in hardware 96HW_ASSISTED_COHERENCY := 1 97 98# When building for systems with hardware-assisted coherency, there's no need to 99# use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too. 100USE_COHERENT_MEM := 0 101 102# Add TARGET_PLATFORM to differentiate between Morello FVP and Morello SoC platform 103$(eval $(call add_define,TARGET_PLATFORM_$(call uppercase,${TARGET_PLATFORM}))) 104 105# Add MORELLO_FW_NVCTR_VAL 106$(eval $(call add_define,MORELLO_FW_NVCTR_VAL)) 107 108include plat/arm/common/arm_common.mk 109include plat/arm/css/common/css_common.mk 110include plat/arm/board/common/board_common.mk 111