1# 2# Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7JUNO_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ 8 drivers/arm/gic/v2/gicv2_main.c \ 9 drivers/arm/gic/v2/gicv2_helpers.c \ 10 plat/common/plat_gicv2.c \ 11 plat/arm/common/arm_gicv2.c 12 13JUNO_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c \ 14 plat/arm/common/arm_cci.c 15 16JUNO_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \ 17 plat/arm/board/juno/juno_security.c \ 18 plat/arm/board/juno/juno_trng.c \ 19 plat/arm/common/arm_tzc400.c 20 21ifneq (${ENABLE_STACK_PROTECTOR}, 0) 22JUNO_SECURITY_SOURCES += plat/arm/board/juno/juno_stack_protector.c 23endif 24 25# Select SCMI/SDS drivers instead of SCPI/BOM driver for communicating with the 26# SCP during power management operations and for SCP RAM Firmware transfer. 27CSS_USE_SCMI_SDS_DRIVER := 1 28 29PLAT_INCLUDES := -Iplat/arm/board/juno/include \ 30 -Iplat/arm/css/drivers/sds 31 32PLAT_BL_COMMON_SOURCES := plat/arm/board/juno/${ARCH}/juno_helpers.S 33 34# Flag to enable support for AArch32 state on JUNO 35JUNO_AARCH32_EL3_RUNTIME := 0 36$(eval $(call assert_boolean,JUNO_AARCH32_EL3_RUNTIME)) 37$(eval $(call add_define,JUNO_AARCH32_EL3_RUNTIME)) 38 39# Flag to enable support for TZMP1 on JUNO 40JUNO_TZMP1 := 0 41$(eval $(call assert_boolean,JUNO_TZMP1)) 42ifeq (${JUNO_TZMP1}, 1) 43$(eval $(call add_define,JUNO_TZMP1)) 44endif 45 46ifeq (${JUNO_AARCH32_EL3_RUNTIME}, 1) 47# Include BL32 in FIP 48NEED_BL32 := yes 49# BL31 is not required 50override BL31_SOURCES = 51 52# The BL32 needs to be built separately invoking the AARCH32 compiler and 53# be specifed via `BL32` build option. 54 ifneq (${ARCH}, aarch32) 55 override BL32_SOURCES = 56 endif 57endif 58 59ifeq (${ARCH},aarch64) 60BL1_SOURCES += lib/cpus/aarch64/cortex_a53.S \ 61 lib/cpus/aarch64/cortex_a57.S \ 62 lib/cpus/aarch64/cortex_a72.S \ 63 plat/arm/board/juno/juno_err.c \ 64 plat/arm/board/juno/juno_bl1_setup.c \ 65 ${JUNO_INTERCONNECT_SOURCES} \ 66 ${JUNO_SECURITY_SOURCES} 67 68BL2_SOURCES += lib/utils/mem_region.c \ 69 plat/arm/board/juno/juno_err.c \ 70 plat/arm/board/juno/juno_bl2_setup.c \ 71 plat/arm/common/arm_nor_psci_mem_protect.c \ 72 ${JUNO_SECURITY_SOURCES} 73 74BL2U_SOURCES += ${JUNO_SECURITY_SOURCES} 75 76BL31_SOURCES += drivers/cfi/v2m/v2m_flash.c \ 77 lib/cpus/aarch64/cortex_a53.S \ 78 lib/cpus/aarch64/cortex_a57.S \ 79 lib/cpus/aarch64/cortex_a72.S \ 80 lib/utils/mem_region.c \ 81 plat/arm/board/juno/juno_topology.c \ 82 plat/arm/common/arm_nor_psci_mem_protect.c \ 83 ${JUNO_GIC_SOURCES} \ 84 ${JUNO_INTERCONNECT_SOURCES} \ 85 ${JUNO_SECURITY_SOURCES} 86 87ifeq (${CSS_USE_SCMI_SDS_DRIVER},1) 88BL1_SOURCES += plat/arm/css/drivers/sds/sds.c 89endif 90 91endif 92 93ifneq (${RESET_TO_BL31},0) 94 $(error "Using BL31 as the reset vector is not supported on ${PLATFORM} platform. \ 95 Please set RESET_TO_BL31 to 0.") 96endif 97 98# Errata workarounds for Cortex-A53: 99ERRATA_A53_826319 := 1 100ERRATA_A53_835769 := 1 101ERRATA_A53_836870 := 1 102ERRATA_A53_843419 := 1 103ERRATA_A53_855873 := 1 104 105# Errata workarounds for Cortex-A57: 106ERRATA_A57_806969 := 0 107ERRATA_A57_813419 := 1 108ERRATA_A57_813420 := 1 109ERRATA_A57_826974 := 1 110ERRATA_A57_826977 := 1 111ERRATA_A57_828024 := 1 112ERRATA_A57_829520 := 1 113ERRATA_A57_833471 := 1 114ERRATA_A57_859972 := 0 115 116# Errata workarounds for Cortex-A72: 117ERRATA_A72_859971 := 0 118 119# Enable option to skip L1 data cache flush during the Cortex-A57 cluster 120# power down sequence 121SKIP_A57_L1_FLUSH_PWR_DWN := 1 122 123# Do not enable SVE 124ENABLE_SVE_FOR_NS := 0 125 126include plat/arm/board/common/board_css.mk 127include plat/arm/common/arm_common.mk 128include plat/arm/soc/common/soc_css.mk 129include plat/arm/css/common/css_common.mk 130 131