xref: /rk3399_ARM-atf/plat/arm/board/juno/platform.mk (revision afa5cfea6079bf7a10db53edcc72e6b8fa05c600)
185135283SDan Handley#
260a23fd8SSummer Qin# Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
385135283SDan Handley#
482cb2c1aSdp-arm# SPDX-License-Identifier: BSD-3-Clause
585135283SDan Handley#
685135283SDan Handley
727573c59SAchin GuptaJUNO_GIC_SOURCES	:=	drivers/arm/gic/common/gic_common.c	\
827573c59SAchin Gupta				drivers/arm/gic/v2/gicv2_main.c		\
927573c59SAchin Gupta				drivers/arm/gic/v2/gicv2_helpers.c	\
1027573c59SAchin Gupta				plat/common/plat_gicv2.c		\
1127573c59SAchin Gupta				plat/arm/common/arm_gicv2.c
1227573c59SAchin Gupta
136355f234SVikram KanigiriJUNO_INTERCONNECT_SOURCES	:=	drivers/arm/cci/cci.c		\
146355f234SVikram Kanigiri					plat/arm/common/arm_cci.c
156355f234SVikram Kanigiri
1657f78201SSoby MathewJUNO_SECURITY_SOURCES	:=	drivers/arm/tzc/tzc400.c		\
17a9cc84d7SVikram Kanigiri				plat/arm/board/juno/juno_security.c	\
18df9a39eaSdp-arm				plat/arm/board/juno/juno_trng.c		\
19a9cc84d7SVikram Kanigiri				plat/arm/common/arm_tzc400.c
20a9cc84d7SVikram Kanigiri
21e6d2aea1Sdp-armifneq (${ENABLE_STACK_PROTECTOR}, 0)
22e6d2aea1Sdp-armJUNO_SECURITY_SOURCES	+=	plat/arm/board/juno/juno_stack_protector.c
23e6d2aea1Sdp-armendif
246355f234SVikram Kanigiri
254da6f6cdSSathees Balya# Select SCMI/SDS drivers instead of SCPI/BOM driver for communicating with the
264da6f6cdSSathees Balya# SCP during power management operations and for SCP RAM Firmware transfer.
274da6f6cdSSathees BalyaCSS_USE_SCMI_SDS_DRIVER		:=	1
284da6f6cdSSathees Balya
294da6f6cdSSathees BalyaPLAT_INCLUDES		:=	-Iplat/arm/board/juno/include		\
304da6f6cdSSathees Balya				-Iplat/arm/css/drivers/sds
3185135283SDan Handley
3258ea77a0SAntonio Nino DiazPLAT_BL_COMMON_SOURCES	:=	plat/arm/board/juno/${ARCH}/juno_helpers.S \
3358ea77a0SAntonio Nino Diaz				plat/arm/board/juno/juno_common.c
3485135283SDan Handley
3507570d59SYatharth Kochar# Flag to enable support for AArch32 state on JUNO
3607570d59SYatharth KocharJUNO_AARCH32_EL3_RUNTIME	:=	0
3707570d59SYatharth Kochar$(eval $(call assert_boolean,JUNO_AARCH32_EL3_RUNTIME))
3807570d59SYatharth Kochar$(eval $(call add_define,JUNO_AARCH32_EL3_RUNTIME))
3907570d59SYatharth Kochar
4060a23fd8SSummer Qin# Flag to enable support for TZMP1 on JUNO
4160a23fd8SSummer QinJUNO_TZMP1		:=	0
4260a23fd8SSummer Qin$(eval $(call assert_boolean,JUNO_TZMP1))
4360a23fd8SSummer Qinifeq (${JUNO_TZMP1}, 1)
4460a23fd8SSummer Qin$(eval $(call add_define,JUNO_TZMP1))
4560a23fd8SSummer Qinendif
4660a23fd8SSummer Qin
475744e874SSoby Mathewifeq (${JUNO_AARCH32_EL3_RUNTIME}, 1)
485744e874SSoby Mathew# Include BL32 in FIP
495744e874SSoby MathewNEED_BL32		:= yes
505744e874SSoby Mathew# BL31 is not required
515744e874SSoby Mathewoverride BL31_SOURCES =
525744e874SSoby Mathew
535744e874SSoby Mathew# The BL32 needs to be built separately invoking the AARCH32 compiler and
545744e874SSoby Mathew# be specifed via `BL32` build option.
555744e874SSoby Mathew  ifneq (${ARCH}, aarch32)
565744e874SSoby Mathew    override BL32_SOURCES =
575744e874SSoby Mathew  endif
585744e874SSoby Mathewendif
595744e874SSoby Mathew
6007570d59SYatharth Kocharifeq (${ARCH},aarch64)
6185135283SDan HandleyBL1_SOURCES		+=	lib/cpus/aarch64/cortex_a53.S		\
620f829ea9SBrendan Jackman				lib/cpus/aarch64/cortex_a57.S		\
637b4c1405SJuan Castillo				lib/cpus/aarch64/cortex_a72.S		\
644da6f6cdSSathees Balya				plat/arm/board/juno/juno_err.c		\
65436223deSYatharth Kochar				plat/arm/board/juno/juno_bl1_setup.c	\
66e6d2aea1Sdp-arm				${JUNO_INTERCONNECT_SOURCES}		\
67e6d2aea1Sdp-arm				${JUNO_SECURITY_SOURCES}
6885135283SDan Handley
699d57a147SRoberto VargasBL2_SOURCES		+=	lib/utils/mem_region.c			\
704da6f6cdSSathees Balya				plat/arm/board/juno/juno_err.c		\
719d57a147SRoberto Vargas				plat/arm/board/juno/juno_bl2_setup.c	\
729d57a147SRoberto Vargas				plat/arm/common/arm_nor_psci_mem_protect.c \
73a9cc84d7SVikram Kanigiri				${JUNO_SECURITY_SOURCES}
7485135283SDan Handley
75a9cc84d7SVikram KanigiriBL2U_SOURCES		+=	${JUNO_SECURITY_SOURCES}
76dcda29f6SYatharth Kochar
77aa7877c4SAntonio Nino DiazBL31_SOURCES		+=	drivers/cfi/v2m/v2m_flash.c		\
78aa7877c4SAntonio Nino Diaz				lib/cpus/aarch64/cortex_a53.S		\
79c1bb8a05SSoby Mathew				lib/cpus/aarch64/cortex_a57.S		\
800f829ea9SBrendan Jackman				lib/cpus/aarch64/cortex_a72.S		\
819d57a147SRoberto Vargas				lib/utils/mem_region.c			\
820108047aSSoby Mathew				plat/arm/board/juno/juno_topology.c	\
839d57a147SRoberto Vargas				plat/arm/common/arm_nor_psci_mem_protect.c \
84a9cc84d7SVikram Kanigiri				${JUNO_GIC_SOURCES}			\
856355f234SVikram Kanigiri				${JUNO_INTERCONNECT_SOURCES}		\
86a9cc84d7SVikram Kanigiri				${JUNO_SECURITY_SOURCES}
874da6f6cdSSathees Balya
884da6f6cdSSathees Balyaifeq (${CSS_USE_SCMI_SDS_DRIVER},1)
894da6f6cdSSathees BalyaBL1_SOURCES		+=	plat/arm/css/drivers/sds/sds.c
904da6f6cdSSathees Balyaendif
914da6f6cdSSathees Balya
9207570d59SYatharth Kocharendif
9385135283SDan Handley
9449d3a621SDeepak Pandeyifneq (${RESET_TO_BL31},0)
9549d3a621SDeepak Pandey  $(error "Using BL31 as the reset vector is not supported on ${PLATFORM} platform. \
9649d3a621SDeepak Pandey  Please set RESET_TO_BL31 to 0.")
9749d3a621SDeepak Pandeyendif
9849d3a621SDeepak Pandey
99*afa5cfeaSSathees Balyaifeq ($(USE_ROMLIB),1)
100*afa5cfeaSSathees Balyaall : bl1_romlib.bin
101*afa5cfeaSSathees Balyaendif
102*afa5cfeaSSathees Balya
103*afa5cfeaSSathees Balyabl1_romlib.bin : $(BUILD_PLAT)/bl1.bin $(BUILD_PLAT)/romlib/romlib.bin
104*afa5cfeaSSathees Balya	@echo "Building combined BL1 and ROMLIB binary for Juno $@"
105*afa5cfeaSSathees Balya	./lib/romlib/gen_combined_bl1_romlib.sh -o bl1_romlib.bin $(BUILD_PLAT)
106*afa5cfeaSSathees Balya
10796ff2601SEleanor Bonnici# Errata workarounds for Cortex-A53:
10896ff2601SEleanor BonniciERRATA_A53_826319		:=	1
109a94cc374SDouglas RaillardERRATA_A53_835769		:=	1
11096ff2601SEleanor BonniciERRATA_A53_836870		:=	1
111a94cc374SDouglas RaillardERRATA_A53_843419		:=	1
112b75dc0e4SAndre PrzywaraERRATA_A53_855873		:=	1
11396ff2601SEleanor Bonnici
11496ff2601SEleanor Bonnici# Errata workarounds for Cortex-A57:
11585135283SDan HandleyERRATA_A57_806969		:=	0
116ccbec91cSAntonio Nino DiazERRATA_A57_813419		:=	1
11785135283SDan HandleyERRATA_A57_813420		:=	1
1186f822cccSDouglas RaillardERRATA_A57_826974		:=	1
1196f822cccSDouglas RaillardERRATA_A57_826977		:=	1
1206f822cccSDouglas RaillardERRATA_A57_828024		:=	1
1216f822cccSDouglas RaillardERRATA_A57_829520		:=	1
1226f822cccSDouglas RaillardERRATA_A57_833471		:=	1
12396ff2601SEleanor BonniciERRATA_A57_859972		:=	0
1246f822cccSDouglas Raillard
12596ff2601SEleanor Bonnici# Errata workarounds for Cortex-A72:
12696ff2601SEleanor BonniciERRATA_A72_859971		:=	0
12785135283SDan Handley
12885135283SDan Handley# Enable option to skip L1 data cache flush during the Cortex-A57 cluster
12985135283SDan Handley# power down sequence
13085135283SDan HandleySKIP_A57_L1_FLUSH_PWR_DWN	:=	 1
13185135283SDan Handley
1323872fc2dSDavid Cunado# Do not enable SVE
1333872fc2dSDavid CunadoENABLE_SVE_FOR_NS		:=	0
1343872fc2dSDavid Cunado
13558ea77a0SAntonio Nino Diazinclude plat/arm/board/common/board_common.mk
13685135283SDan Handleyinclude plat/arm/common/arm_common.mk
13785135283SDan Handleyinclude plat/arm/soc/common/soc_css.mk
13885135283SDan Handleyinclude plat/arm/css/common/css_common.mk
1391779ba6bSJuan Castillo
140