xref: /rk3399_ARM-atf/plat/arm/board/juno/platform.mk (revision aa7877c4bf68fa6ad6813323f659b82355acaab5)
185135283SDan Handley#
260a23fd8SSummer Qin# Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
385135283SDan Handley#
482cb2c1aSdp-arm# SPDX-License-Identifier: BSD-3-Clause
585135283SDan Handley#
685135283SDan Handley
727573c59SAchin GuptaJUNO_GIC_SOURCES	:=	drivers/arm/gic/common/gic_common.c	\
827573c59SAchin Gupta				drivers/arm/gic/v2/gicv2_main.c		\
927573c59SAchin Gupta				drivers/arm/gic/v2/gicv2_helpers.c	\
1027573c59SAchin Gupta				plat/common/plat_gicv2.c		\
1127573c59SAchin Gupta				plat/arm/common/arm_gicv2.c
1227573c59SAchin Gupta
136355f234SVikram KanigiriJUNO_INTERCONNECT_SOURCES	:=	drivers/arm/cci/cci.c		\
146355f234SVikram Kanigiri					plat/arm/common/arm_cci.c
156355f234SVikram Kanigiri
1657f78201SSoby MathewJUNO_SECURITY_SOURCES	:=	drivers/arm/tzc/tzc400.c		\
17a9cc84d7SVikram Kanigiri				plat/arm/board/juno/juno_security.c	\
18df9a39eaSdp-arm				plat/arm/board/juno/juno_trng.c		\
19a9cc84d7SVikram Kanigiri				plat/arm/common/arm_tzc400.c
20a9cc84d7SVikram Kanigiri
21e6d2aea1Sdp-armifneq (${ENABLE_STACK_PROTECTOR}, 0)
22e6d2aea1Sdp-armJUNO_SECURITY_SOURCES	+=	plat/arm/board/juno/juno_stack_protector.c
23e6d2aea1Sdp-armendif
246355f234SVikram Kanigiri
254da6f6cdSSathees Balya# Select SCMI/SDS drivers instead of SCPI/BOM driver for communicating with the
264da6f6cdSSathees Balya# SCP during power management operations and for SCP RAM Firmware transfer.
274da6f6cdSSathees BalyaCSS_USE_SCMI_SDS_DRIVER		:=	1
284da6f6cdSSathees Balya
294da6f6cdSSathees BalyaPLAT_INCLUDES		:=	-Iplat/arm/board/juno/include		\
304da6f6cdSSathees Balya				-Iplat/arm/css/drivers/sds
3185135283SDan Handley
3207570d59SYatharth KocharPLAT_BL_COMMON_SOURCES	:=	plat/arm/board/juno/${ARCH}/juno_helpers.S
3385135283SDan Handley
3407570d59SYatharth Kochar# Flag to enable support for AArch32 state on JUNO
3507570d59SYatharth KocharJUNO_AARCH32_EL3_RUNTIME	:=	0
3607570d59SYatharth Kochar$(eval $(call assert_boolean,JUNO_AARCH32_EL3_RUNTIME))
3707570d59SYatharth Kochar$(eval $(call add_define,JUNO_AARCH32_EL3_RUNTIME))
3807570d59SYatharth Kochar
3960a23fd8SSummer Qin# Flag to enable support for TZMP1 on JUNO
4060a23fd8SSummer QinJUNO_TZMP1		:=	0
4160a23fd8SSummer Qin$(eval $(call assert_boolean,JUNO_TZMP1))
4260a23fd8SSummer Qinifeq (${JUNO_TZMP1}, 1)
4360a23fd8SSummer Qin$(eval $(call add_define,JUNO_TZMP1))
4460a23fd8SSummer Qinendif
4560a23fd8SSummer Qin
465744e874SSoby Mathewifeq (${JUNO_AARCH32_EL3_RUNTIME}, 1)
475744e874SSoby Mathew# Include BL32 in FIP
485744e874SSoby MathewNEED_BL32		:= yes
495744e874SSoby Mathew# BL31 is not required
505744e874SSoby Mathewoverride BL31_SOURCES =
515744e874SSoby Mathew
525744e874SSoby Mathew# The BL32 needs to be built separately invoking the AARCH32 compiler and
535744e874SSoby Mathew# be specifed via `BL32` build option.
545744e874SSoby Mathew  ifneq (${ARCH}, aarch32)
555744e874SSoby Mathew    override BL32_SOURCES =
565744e874SSoby Mathew  endif
575744e874SSoby Mathewendif
585744e874SSoby Mathew
5907570d59SYatharth Kocharifeq (${ARCH},aarch64)
6085135283SDan HandleyBL1_SOURCES		+=	lib/cpus/aarch64/cortex_a53.S		\
610f829ea9SBrendan Jackman				lib/cpus/aarch64/cortex_a57.S		\
627b4c1405SJuan Castillo				lib/cpus/aarch64/cortex_a72.S		\
634da6f6cdSSathees Balya				plat/arm/board/juno/juno_err.c		\
64436223deSYatharth Kochar				plat/arm/board/juno/juno_bl1_setup.c	\
65e6d2aea1Sdp-arm				${JUNO_INTERCONNECT_SOURCES}		\
66e6d2aea1Sdp-arm				${JUNO_SECURITY_SOURCES}
6785135283SDan Handley
689d57a147SRoberto VargasBL2_SOURCES		+=	lib/utils/mem_region.c			\
694da6f6cdSSathees Balya				plat/arm/board/juno/juno_err.c		\
709d57a147SRoberto Vargas				plat/arm/board/juno/juno_bl2_setup.c	\
719d57a147SRoberto Vargas				plat/arm/common/arm_nor_psci_mem_protect.c \
72a9cc84d7SVikram Kanigiri				${JUNO_SECURITY_SOURCES}
7385135283SDan Handley
74a9cc84d7SVikram KanigiriBL2U_SOURCES		+=	${JUNO_SECURITY_SOURCES}
75dcda29f6SYatharth Kochar
76*aa7877c4SAntonio Nino DiazBL31_SOURCES		+=	drivers/cfi/v2m/v2m_flash.c		\
77*aa7877c4SAntonio Nino Diaz				lib/cpus/aarch64/cortex_a53.S		\
78c1bb8a05SSoby Mathew				lib/cpus/aarch64/cortex_a57.S		\
790f829ea9SBrendan Jackman				lib/cpus/aarch64/cortex_a72.S		\
809d57a147SRoberto Vargas				lib/utils/mem_region.c			\
810108047aSSoby Mathew				plat/arm/board/juno/juno_topology.c	\
829d57a147SRoberto Vargas				plat/arm/common/arm_nor_psci_mem_protect.c \
83a9cc84d7SVikram Kanigiri				${JUNO_GIC_SOURCES}			\
846355f234SVikram Kanigiri				${JUNO_INTERCONNECT_SOURCES}		\
85a9cc84d7SVikram Kanigiri				${JUNO_SECURITY_SOURCES}
864da6f6cdSSathees Balya
874da6f6cdSSathees Balyaifeq (${CSS_USE_SCMI_SDS_DRIVER},1)
884da6f6cdSSathees BalyaBL1_SOURCES		+=	plat/arm/css/drivers/sds/sds.c
894da6f6cdSSathees Balyaendif
904da6f6cdSSathees Balya
9107570d59SYatharth Kocharendif
9285135283SDan Handley
9396ff2601SEleanor Bonnici# Errata workarounds for Cortex-A53:
9496ff2601SEleanor BonniciERRATA_A53_826319		:=	1
95a94cc374SDouglas RaillardERRATA_A53_835769		:=	1
9696ff2601SEleanor BonniciERRATA_A53_836870		:=	1
97a94cc374SDouglas RaillardERRATA_A53_843419		:=	1
98b75dc0e4SAndre PrzywaraERRATA_A53_855873		:=	1
9996ff2601SEleanor Bonnici
10096ff2601SEleanor Bonnici# Errata workarounds for Cortex-A57:
10185135283SDan HandleyERRATA_A57_806969		:=	0
102ccbec91cSAntonio Nino DiazERRATA_A57_813419		:=	1
10385135283SDan HandleyERRATA_A57_813420		:=	1
1046f822cccSDouglas RaillardERRATA_A57_826974		:=	1
1056f822cccSDouglas RaillardERRATA_A57_826977		:=	1
1066f822cccSDouglas RaillardERRATA_A57_828024		:=	1
1076f822cccSDouglas RaillardERRATA_A57_829520		:=	1
1086f822cccSDouglas RaillardERRATA_A57_833471		:=	1
10996ff2601SEleanor BonniciERRATA_A57_859972		:=	0
1106f822cccSDouglas Raillard
11196ff2601SEleanor Bonnici# Errata workarounds for Cortex-A72:
11296ff2601SEleanor BonniciERRATA_A72_859971		:=	0
11385135283SDan Handley
11485135283SDan Handley# Enable option to skip L1 data cache flush during the Cortex-A57 cluster
11585135283SDan Handley# power down sequence
11685135283SDan HandleySKIP_A57_L1_FLUSH_PWR_DWN	:=	 1
11785135283SDan Handley
1183872fc2dSDavid Cunado# Do not enable SVE
1193872fc2dSDavid CunadoENABLE_SVE_FOR_NS		:=	0
1203872fc2dSDavid Cunado
12185135283SDan Handleyinclude plat/arm/board/common/board_css.mk
12285135283SDan Handleyinclude plat/arm/common/arm_common.mk
12385135283SDan Handleyinclude plat/arm/soc/common/soc_css.mk
12485135283SDan Handleyinclude plat/arm/css/common/css_common.mk
1251779ba6bSJuan Castillo
126