xref: /rk3399_ARM-atf/plat/arm/board/juno/platform.mk (revision 8075fc5910113cb1838c84a8595654512c142e19)
185135283SDan Handley#
23661d8e7SAntonio Nino Diaz# Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
385135283SDan Handley#
482cb2c1aSdp-arm# SPDX-License-Identifier: BSD-3-Clause
585135283SDan Handley#
685135283SDan Handley
727573c59SAchin GuptaJUNO_GIC_SOURCES	:=	drivers/arm/gic/common/gic_common.c	\
827573c59SAchin Gupta				drivers/arm/gic/v2/gicv2_main.c		\
927573c59SAchin Gupta				drivers/arm/gic/v2/gicv2_helpers.c	\
1027573c59SAchin Gupta				plat/common/plat_gicv2.c		\
1127573c59SAchin Gupta				plat/arm/common/arm_gicv2.c
1227573c59SAchin Gupta
136355f234SVikram KanigiriJUNO_INTERCONNECT_SOURCES	:=	drivers/arm/cci/cci.c		\
146355f234SVikram Kanigiri					plat/arm/common/arm_cci.c
156355f234SVikram Kanigiri
1657f78201SSoby MathewJUNO_SECURITY_SOURCES	:=	drivers/arm/tzc/tzc400.c		\
17a9cc84d7SVikram Kanigiri				plat/arm/board/juno/juno_security.c	\
18df9a39eaSdp-arm				plat/arm/board/juno/juno_trng.c		\
19a9cc84d7SVikram Kanigiri				plat/arm/common/arm_tzc400.c
20a9cc84d7SVikram Kanigiri
21e6d2aea1Sdp-armifneq (${ENABLE_STACK_PROTECTOR}, 0)
22e6d2aea1Sdp-armJUNO_SECURITY_SOURCES	+=	plat/arm/board/juno/juno_stack_protector.c
23e6d2aea1Sdp-armendif
246355f234SVikram Kanigiri
254da6f6cdSSathees Balya# Select SCMI/SDS drivers instead of SCPI/BOM driver for communicating with the
264da6f6cdSSathees Balya# SCP during power management operations and for SCP RAM Firmware transfer.
274da6f6cdSSathees BalyaCSS_USE_SCMI_SDS_DRIVER		:=	1
284da6f6cdSSathees Balya
295932d194SAntonio Nino DiazPLAT_INCLUDES		:=	-Iplat/arm/board/juno/include
3085135283SDan Handley
3158ea77a0SAntonio Nino DiazPLAT_BL_COMMON_SOURCES	:=	plat/arm/board/juno/${ARCH}/juno_helpers.S \
3258ea77a0SAntonio Nino Diaz				plat/arm/board/juno/juno_common.c
3385135283SDan Handley
3407570d59SYatharth Kochar# Flag to enable support for AArch32 state on JUNO
3507570d59SYatharth KocharJUNO_AARCH32_EL3_RUNTIME	:=	0
3607570d59SYatharth Kochar$(eval $(call assert_boolean,JUNO_AARCH32_EL3_RUNTIME))
3707570d59SYatharth Kochar$(eval $(call add_define,JUNO_AARCH32_EL3_RUNTIME))
3807570d59SYatharth Kochar
3960a23fd8SSummer Qin# Flag to enable support for TZMP1 on JUNO
4060a23fd8SSummer QinJUNO_TZMP1		:=	0
4160a23fd8SSummer Qin$(eval $(call assert_boolean,JUNO_TZMP1))
4260a23fd8SSummer Qinifeq (${JUNO_TZMP1}, 1)
4360a23fd8SSummer Qin$(eval $(call add_define,JUNO_TZMP1))
4460a23fd8SSummer Qinendif
4560a23fd8SSummer Qin
465744e874SSoby Mathewifeq (${JUNO_AARCH32_EL3_RUNTIME}, 1)
475744e874SSoby Mathew# Include BL32 in FIP
485744e874SSoby MathewNEED_BL32		:= yes
495744e874SSoby Mathew# BL31 is not required
505744e874SSoby Mathewoverride BL31_SOURCES =
515744e874SSoby Mathew
525744e874SSoby Mathew# The BL32 needs to be built separately invoking the AARCH32 compiler and
535744e874SSoby Mathew# be specifed via `BL32` build option.
545744e874SSoby Mathew  ifneq (${ARCH}, aarch32)
555744e874SSoby Mathew    override BL32_SOURCES =
565744e874SSoby Mathew  endif
575744e874SSoby Mathewendif
585744e874SSoby Mathew
5907570d59SYatharth Kocharifeq (${ARCH},aarch64)
6085135283SDan HandleyBL1_SOURCES		+=	lib/cpus/aarch64/cortex_a53.S		\
610f829ea9SBrendan Jackman				lib/cpus/aarch64/cortex_a57.S		\
627b4c1405SJuan Castillo				lib/cpus/aarch64/cortex_a72.S		\
634da6f6cdSSathees Balya				plat/arm/board/juno/juno_err.c		\
64436223deSYatharth Kochar				plat/arm/board/juno/juno_bl1_setup.c	\
65b0c97dafSAditya Angadi				drivers/arm/sp805/sp805.c		\
66e6d2aea1Sdp-arm				${JUNO_INTERCONNECT_SOURCES}		\
67e6d2aea1Sdp-arm				${JUNO_SECURITY_SOURCES}
6885135283SDan Handley
6937b70031SAmbroise VincentBL2_SOURCES		+=	drivers/arm/sp805/sp805.c		\
7037b70031SAmbroise Vincent				lib/utils/mem_region.c			\
714da6f6cdSSathees Balya				plat/arm/board/juno/juno_err.c		\
729d57a147SRoberto Vargas				plat/arm/board/juno/juno_bl2_setup.c	\
739d57a147SRoberto Vargas				plat/arm/common/arm_nor_psci_mem_protect.c \
74a9cc84d7SVikram Kanigiri				${JUNO_SECURITY_SOURCES}
7585135283SDan Handley
76a9cc84d7SVikram KanigiriBL2U_SOURCES		+=	${JUNO_SECURITY_SOURCES}
77dcda29f6SYatharth Kochar
78aa7877c4SAntonio Nino DiazBL31_SOURCES		+=	drivers/cfi/v2m/v2m_flash.c		\
79aa7877c4SAntonio Nino Diaz				lib/cpus/aarch64/cortex_a53.S		\
80c1bb8a05SSoby Mathew				lib/cpus/aarch64/cortex_a57.S		\
810f829ea9SBrendan Jackman				lib/cpus/aarch64/cortex_a72.S		\
829d57a147SRoberto Vargas				lib/utils/mem_region.c			\
8389f2e589SChandni Cherukuri				plat/arm/board/juno/juno_pm.c		\
840108047aSSoby Mathew				plat/arm/board/juno/juno_topology.c	\
859d57a147SRoberto Vargas				plat/arm/common/arm_nor_psci_mem_protect.c \
86a9cc84d7SVikram Kanigiri				${JUNO_GIC_SOURCES}			\
876355f234SVikram Kanigiri				${JUNO_INTERCONNECT_SOURCES}		\
88a9cc84d7SVikram Kanigiri				${JUNO_SECURITY_SOURCES}
894da6f6cdSSathees Balya
904da6f6cdSSathees Balyaifeq (${CSS_USE_SCMI_SDS_DRIVER},1)
915932d194SAntonio Nino DiazBL1_SOURCES		+=	drivers/arm/css/sds/sds.c
924da6f6cdSSathees Balyaendif
934da6f6cdSSathees Balya
9407570d59SYatharth Kocharendif
9585135283SDan Handley
9649d3a621SDeepak Pandeyifneq (${RESET_TO_BL31},0)
979ce0d321SSandrine Bailleux  $(error "Using BL31 as the reset vector is not supported on ${PLAT} platform. \
9849d3a621SDeepak Pandey  Please set RESET_TO_BL31 to 0.")
9949d3a621SDeepak Pandeyendif
10049d3a621SDeepak Pandey
101afa5cfeaSSathees Balyaifeq ($(USE_ROMLIB),1)
102afa5cfeaSSathees Balyaall : bl1_romlib.bin
103afa5cfeaSSathees Balyaendif
104afa5cfeaSSathees Balya
105afa5cfeaSSathees Balyabl1_romlib.bin : $(BUILD_PLAT)/bl1.bin $(BUILD_PLAT)/romlib/romlib.bin
106afa5cfeaSSathees Balya	@echo "Building combined BL1 and ROMLIB binary for Juno $@"
107afa5cfeaSSathees Balya	./lib/romlib/gen_combined_bl1_romlib.sh -o bl1_romlib.bin $(BUILD_PLAT)
108afa5cfeaSSathees Balya
10996ff2601SEleanor Bonnici# Errata workarounds for Cortex-A53:
110d6bf24dcSAmbroise VincentERRATA_A53_819472		:=	1
111d6bf24dcSAmbroise VincentERRATA_A53_824069		:=	1
11296ff2601SEleanor BonniciERRATA_A53_826319		:=	1
113d6bf24dcSAmbroise VincentERRATA_A53_827319		:=	1
114a94cc374SDouglas RaillardERRATA_A53_835769		:=	1
11596ff2601SEleanor BonniciERRATA_A53_836870		:=	1
116a94cc374SDouglas RaillardERRATA_A53_843419		:=	1
117b75dc0e4SAndre PrzywaraERRATA_A53_855873		:=	1
11896ff2601SEleanor Bonnici
11996ff2601SEleanor Bonnici# Errata workarounds for Cortex-A57:
12085135283SDan HandleyERRATA_A57_806969		:=	0
121ccbec91cSAntonio Nino DiazERRATA_A57_813419		:=	1
12285135283SDan HandleyERRATA_A57_813420		:=	1
123d6bf24dcSAmbroise VincentERRATA_A57_814670		:=	1
124d6bf24dcSAmbroise VincentERRATA_A57_817169		:=	1
1256f822cccSDouglas RaillardERRATA_A57_826974		:=	1
1266f822cccSDouglas RaillardERRATA_A57_826977		:=	1
1276f822cccSDouglas RaillardERRATA_A57_828024		:=	1
1286f822cccSDouglas RaillardERRATA_A57_829520		:=	1
1296f822cccSDouglas RaillardERRATA_A57_833471		:=	1
13096ff2601SEleanor BonniciERRATA_A57_859972		:=	0
1316f822cccSDouglas Raillard
13296ff2601SEleanor Bonnici# Errata workarounds for Cortex-A72:
13396ff2601SEleanor BonniciERRATA_A72_859971		:=	0
13485135283SDan Handley
13585135283SDan Handley# Enable option to skip L1 data cache flush during the Cortex-A57 cluster
13685135283SDan Handley# power down sequence
13785135283SDan HandleySKIP_A57_L1_FLUSH_PWR_DWN	:=	 1
13885135283SDan Handley
1393872fc2dSDavid Cunado# Do not enable SVE
1403872fc2dSDavid CunadoENABLE_SVE_FOR_NS		:=	0
1413872fc2dSDavid Cunado
1423661d8e7SAntonio Nino Diaz# Enable the dynamic translation tables library.
1433661d8e7SAntonio Nino Diazifeq (${ARCH},aarch32)
1443661d8e7SAntonio Nino Diaz    ifeq (${RESET_TO_SP_MIN},1)
1453661d8e7SAntonio Nino Diaz        BL32_CFLAGS	+=	-DPLAT_XLAT_TABLES_DYNAMIC=1
1463661d8e7SAntonio Nino Diaz    endif
1473661d8e7SAntonio Nino Diazelse
1483661d8e7SAntonio Nino Diaz    ifeq (${RESET_TO_BL31},1)
1493661d8e7SAntonio Nino Diaz        BL31_CFLAGS	+=	-DPLAT_XLAT_TABLES_DYNAMIC=1
1503661d8e7SAntonio Nino Diaz    endif
1513661d8e7SAntonio Nino Diazendif
1523661d8e7SAntonio Nino Diaz
153*8075fc59SLouis Mayencourt# Add the FDT_SOURCES and options for Dynamic Config
154*8075fc59SLouis MayencourtFDT_SOURCES		+=	plat/arm/board/juno/fdts/${PLAT}_tb_fw_config.dts
155*8075fc59SLouis MayencourtTB_FW_CONFIG		:=	${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
156*8075fc59SLouis Mayencourt
157*8075fc59SLouis Mayencourt# Add the TB_FW_CONFIG to FIP and specify the same to certtool
158*8075fc59SLouis Mayencourt$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config))
159*8075fc59SLouis Mayencourt
16058ea77a0SAntonio Nino Diazinclude plat/arm/board/common/board_common.mk
16185135283SDan Handleyinclude plat/arm/common/arm_common.mk
16285135283SDan Handleyinclude plat/arm/soc/common/soc_css.mk
16385135283SDan Handleyinclude plat/arm/css/common/css_common.mk
164