185135283SDan Handley# 2*60a23fd8SSummer Qin# Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. 385135283SDan Handley# 482cb2c1aSdp-arm# SPDX-License-Identifier: BSD-3-Clause 585135283SDan Handley# 685135283SDan Handley 727573c59SAchin GuptaJUNO_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ 827573c59SAchin Gupta drivers/arm/gic/v2/gicv2_main.c \ 927573c59SAchin Gupta drivers/arm/gic/v2/gicv2_helpers.c \ 1027573c59SAchin Gupta plat/common/plat_gicv2.c \ 1127573c59SAchin Gupta plat/arm/common/arm_gicv2.c 1227573c59SAchin Gupta 136355f234SVikram KanigiriJUNO_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c \ 146355f234SVikram Kanigiri plat/arm/common/arm_cci.c 156355f234SVikram Kanigiri 1657f78201SSoby MathewJUNO_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \ 17a9cc84d7SVikram Kanigiri plat/arm/board/juno/juno_security.c \ 18df9a39eaSdp-arm plat/arm/board/juno/juno_trng.c \ 19a9cc84d7SVikram Kanigiri plat/arm/common/arm_tzc400.c 20a9cc84d7SVikram Kanigiri 21e6d2aea1Sdp-armifneq (${ENABLE_STACK_PROTECTOR}, 0) 22e6d2aea1Sdp-armJUNO_SECURITY_SOURCES += plat/arm/board/juno/juno_stack_protector.c 23e6d2aea1Sdp-armendif 246355f234SVikram Kanigiri 2585135283SDan HandleyPLAT_INCLUDES := -Iplat/arm/board/juno/include 2685135283SDan Handley 2707570d59SYatharth KocharPLAT_BL_COMMON_SOURCES := plat/arm/board/juno/${ARCH}/juno_helpers.S 2885135283SDan Handley 2907570d59SYatharth Kochar# Flag to enable support for AArch32 state on JUNO 3007570d59SYatharth KocharJUNO_AARCH32_EL3_RUNTIME := 0 3107570d59SYatharth Kochar$(eval $(call assert_boolean,JUNO_AARCH32_EL3_RUNTIME)) 3207570d59SYatharth Kochar$(eval $(call add_define,JUNO_AARCH32_EL3_RUNTIME)) 3307570d59SYatharth Kochar 34*60a23fd8SSummer Qin# Flag to enable support for TZMP1 on JUNO 35*60a23fd8SSummer QinJUNO_TZMP1 := 0 36*60a23fd8SSummer Qin$(eval $(call assert_boolean,JUNO_TZMP1)) 37*60a23fd8SSummer Qinifeq (${JUNO_TZMP1}, 1) 38*60a23fd8SSummer Qin$(eval $(call add_define,JUNO_TZMP1)) 39*60a23fd8SSummer Qinendif 40*60a23fd8SSummer Qin 415744e874SSoby Mathewifeq (${JUNO_AARCH32_EL3_RUNTIME}, 1) 425744e874SSoby Mathew# Include BL32 in FIP 435744e874SSoby MathewNEED_BL32 := yes 445744e874SSoby Mathew# BL31 is not required 455744e874SSoby Mathewoverride BL31_SOURCES = 465744e874SSoby Mathew 475744e874SSoby Mathew# The BL32 needs to be built separately invoking the AARCH32 compiler and 485744e874SSoby Mathew# be specifed via `BL32` build option. 495744e874SSoby Mathew ifneq (${ARCH}, aarch32) 505744e874SSoby Mathew override BL32_SOURCES = 515744e874SSoby Mathew endif 525744e874SSoby Mathewendif 535744e874SSoby Mathew 5407570d59SYatharth Kocharifeq (${ARCH},aarch64) 5585135283SDan HandleyBL1_SOURCES += lib/cpus/aarch64/cortex_a53.S \ 560f829ea9SBrendan Jackman lib/cpus/aarch64/cortex_a57.S \ 577b4c1405SJuan Castillo lib/cpus/aarch64/cortex_a72.S \ 58436223deSYatharth Kochar plat/arm/board/juno/juno_bl1_setup.c \ 59e6d2aea1Sdp-arm ${JUNO_INTERCONNECT_SOURCES} \ 60e6d2aea1Sdp-arm ${JUNO_SECURITY_SOURCES} 6185135283SDan Handley 627b56928aSSoby MathewBL2_SOURCES += plat/arm/board/juno/juno_bl2_setup.c \ 63a9cc84d7SVikram Kanigiri ${JUNO_SECURITY_SOURCES} 6485135283SDan Handley 65a9cc84d7SVikram KanigiriBL2U_SOURCES += ${JUNO_SECURITY_SOURCES} 66dcda29f6SYatharth Kochar 6785135283SDan HandleyBL31_SOURCES += lib/cpus/aarch64/cortex_a53.S \ 68c1bb8a05SSoby Mathew lib/cpus/aarch64/cortex_a57.S \ 690f829ea9SBrendan Jackman lib/cpus/aarch64/cortex_a72.S \ 700108047aSSoby Mathew plat/arm/board/juno/juno_topology.c \ 71a9cc84d7SVikram Kanigiri ${JUNO_GIC_SOURCES} \ 726355f234SVikram Kanigiri ${JUNO_INTERCONNECT_SOURCES} \ 73a9cc84d7SVikram Kanigiri ${JUNO_SECURITY_SOURCES} 7407570d59SYatharth Kocharendif 7585135283SDan Handley 7696ff2601SEleanor Bonnici# Errata workarounds for Cortex-A53: 7796ff2601SEleanor BonniciERRATA_A53_826319 := 1 78a94cc374SDouglas RaillardERRATA_A53_835769 := 1 7996ff2601SEleanor BonniciERRATA_A53_836870 := 1 80a94cc374SDouglas RaillardERRATA_A53_843419 := 1 81b75dc0e4SAndre PrzywaraERRATA_A53_855873 := 1 8296ff2601SEleanor Bonnici 8396ff2601SEleanor Bonnici# Errata workarounds for Cortex-A57: 8485135283SDan HandleyERRATA_A57_806969 := 0 85ccbec91cSAntonio Nino DiazERRATA_A57_813419 := 1 8685135283SDan HandleyERRATA_A57_813420 := 1 876f822cccSDouglas RaillardERRATA_A57_826974 := 1 886f822cccSDouglas RaillardERRATA_A57_826977 := 1 896f822cccSDouglas RaillardERRATA_A57_828024 := 1 906f822cccSDouglas RaillardERRATA_A57_829520 := 1 916f822cccSDouglas RaillardERRATA_A57_833471 := 1 9296ff2601SEleanor BonniciERRATA_A57_859972 := 0 936f822cccSDouglas Raillard 9496ff2601SEleanor Bonnici# Errata workarounds for Cortex-A72: 9596ff2601SEleanor BonniciERRATA_A72_859971 := 0 9685135283SDan Handley 9785135283SDan Handley# Enable option to skip L1 data cache flush during the Cortex-A57 cluster 9885135283SDan Handley# power down sequence 9985135283SDan HandleySKIP_A57_L1_FLUSH_PWR_DWN := 1 10085135283SDan Handley 10138dce70fSSoby Mathew# Disable the PSCI platform compatibility layer 10238dce70fSSoby MathewENABLE_PLAT_COMPAT := 0 103c64a0448SVikram Kanigiri 104c64a0448SVikram Kanigiri# Enable memory map related constants optimisation 1050289970dSAntonio Nino DiazARM_BOARD_OPTIMISE_MEM := 1 10638dce70fSSoby Mathew 1073872fc2dSDavid Cunado# Do not enable SVE 1083872fc2dSDavid CunadoENABLE_SVE_FOR_NS := 0 1093872fc2dSDavid Cunado 11001e808c6SSandrine Bailleux# Select SCMI/SDS drivers instead of SCPI/BOM driver for communicating with the 11101e808c6SSandrine Bailleux# SCP during power management operations and for SCP RAM Firmware transfer. 11201e808c6SSandrine BailleuxCSS_USE_SCMI_SDS_DRIVER := 1 11301e808c6SSandrine Bailleux 11485135283SDan Handleyinclude plat/arm/board/common/board_css.mk 11585135283SDan Handleyinclude plat/arm/common/arm_common.mk 11685135283SDan Handleyinclude plat/arm/soc/common/soc_css.mk 11785135283SDan Handleyinclude plat/arm/css/common/css_common.mk 1181779ba6bSJuan Castillo 119