xref: /rk3399_ARM-atf/plat/arm/board/juno/platform.mk (revision 01e808c6f940ebfd472c89d553e6ff386f18bf16)
185135283SDan Handley#
2df9a39eaSdp-arm# Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
385135283SDan Handley#
482cb2c1aSdp-arm# SPDX-License-Identifier: BSD-3-Clause
585135283SDan Handley#
685135283SDan Handley
727573c59SAchin GuptaJUNO_GIC_SOURCES	:=	drivers/arm/gic/common/gic_common.c	\
827573c59SAchin Gupta				drivers/arm/gic/v2/gicv2_main.c		\
927573c59SAchin Gupta				drivers/arm/gic/v2/gicv2_helpers.c	\
1027573c59SAchin Gupta				plat/common/plat_gicv2.c		\
1127573c59SAchin Gupta				plat/arm/common/arm_gicv2.c
1227573c59SAchin Gupta
136355f234SVikram KanigiriJUNO_INTERCONNECT_SOURCES	:=	drivers/arm/cci/cci.c		\
146355f234SVikram Kanigiri					plat/arm/common/arm_cci.c
156355f234SVikram Kanigiri
1657f78201SSoby MathewJUNO_SECURITY_SOURCES	:=	drivers/arm/tzc/tzc400.c		\
17a9cc84d7SVikram Kanigiri				plat/arm/board/juno/juno_security.c	\
18df9a39eaSdp-arm				plat/arm/board/juno/juno_trng.c		\
19a9cc84d7SVikram Kanigiri				plat/arm/common/arm_tzc400.c
20a9cc84d7SVikram Kanigiri
21e6d2aea1Sdp-armifneq (${ENABLE_STACK_PROTECTOR}, 0)
22e6d2aea1Sdp-armJUNO_SECURITY_SOURCES	+=	plat/arm/board/juno/juno_stack_protector.c
23e6d2aea1Sdp-armendif
246355f234SVikram Kanigiri
2585135283SDan HandleyPLAT_INCLUDES		:=	-Iplat/arm/board/juno/include
2685135283SDan Handley
2707570d59SYatharth KocharPLAT_BL_COMMON_SOURCES	:=	plat/arm/board/juno/${ARCH}/juno_helpers.S
2885135283SDan Handley
2907570d59SYatharth Kochar# Flag to enable support for AArch32 state on JUNO
3007570d59SYatharth KocharJUNO_AARCH32_EL3_RUNTIME	:=	0
3107570d59SYatharth Kochar$(eval $(call assert_boolean,JUNO_AARCH32_EL3_RUNTIME))
3207570d59SYatharth Kochar$(eval $(call add_define,JUNO_AARCH32_EL3_RUNTIME))
3307570d59SYatharth Kochar
345744e874SSoby Mathewifeq (${JUNO_AARCH32_EL3_RUNTIME}, 1)
355744e874SSoby Mathew# Include BL32 in FIP
365744e874SSoby MathewNEED_BL32		:= yes
375744e874SSoby Mathew# BL31 is not required
385744e874SSoby Mathewoverride BL31_SOURCES =
395744e874SSoby Mathew
405744e874SSoby Mathew# The BL32 needs to be built separately invoking the AARCH32 compiler and
415744e874SSoby Mathew# be specifed via `BL32` build option.
425744e874SSoby Mathew  ifneq (${ARCH}, aarch32)
435744e874SSoby Mathew    override BL32_SOURCES =
445744e874SSoby Mathew  endif
455744e874SSoby Mathewendif
465744e874SSoby Mathew
4707570d59SYatharth Kocharifeq (${ARCH},aarch64)
4885135283SDan HandleyBL1_SOURCES		+=	lib/cpus/aarch64/cortex_a53.S		\
490f829ea9SBrendan Jackman				lib/cpus/aarch64/cortex_a57.S		\
507b4c1405SJuan Castillo				lib/cpus/aarch64/cortex_a72.S		\
51436223deSYatharth Kochar				plat/arm/board/juno/juno_bl1_setup.c	\
526355f234SVikram Kanigiri				plat/arm/board/juno/juno_err.c		\
53e6d2aea1Sdp-arm				${JUNO_INTERCONNECT_SOURCES}		\
54e6d2aea1Sdp-arm				${JUNO_SECURITY_SOURCES}
5585135283SDan Handley
56a9cc84d7SVikram KanigiriBL2_SOURCES		+=	plat/arm/board/juno/juno_err.c		\
5707570d59SYatharth Kochar				plat/arm/board/juno/juno_bl2_setup.c	\
58a9cc84d7SVikram Kanigiri				${JUNO_SECURITY_SOURCES}
5985135283SDan Handley
60a9cc84d7SVikram KanigiriBL2U_SOURCES		+=	${JUNO_SECURITY_SOURCES}
61dcda29f6SYatharth Kochar
6285135283SDan HandleyBL31_SOURCES		+=	lib/cpus/aarch64/cortex_a53.S		\
63c1bb8a05SSoby Mathew				lib/cpus/aarch64/cortex_a57.S		\
640f829ea9SBrendan Jackman				lib/cpus/aarch64/cortex_a72.S		\
650108047aSSoby Mathew				plat/arm/board/juno/juno_topology.c	\
66a9cc84d7SVikram Kanigiri				${JUNO_GIC_SOURCES}			\
676355f234SVikram Kanigiri				${JUNO_INTERCONNECT_SOURCES}		\
68a9cc84d7SVikram Kanigiri				${JUNO_SECURITY_SOURCES}
6907570d59SYatharth Kocharendif
7085135283SDan Handley
7196ff2601SEleanor Bonnici# Errata workarounds for Cortex-A53:
7296ff2601SEleanor BonniciERRATA_A53_826319		:=	1
73a94cc374SDouglas RaillardERRATA_A53_835769		:=	1
7496ff2601SEleanor BonniciERRATA_A53_836870		:=	1
75a94cc374SDouglas RaillardERRATA_A53_843419		:=	1
76b75dc0e4SAndre PrzywaraERRATA_A53_855873		:=	1
7796ff2601SEleanor Bonnici
7896ff2601SEleanor Bonnici# Errata workarounds for Cortex-A57:
7985135283SDan HandleyERRATA_A57_806969		:=	0
80ccbec91cSAntonio Nino DiazERRATA_A57_813419		:=	1
8185135283SDan HandleyERRATA_A57_813420		:=	1
826f822cccSDouglas RaillardERRATA_A57_826974		:=	1
836f822cccSDouglas RaillardERRATA_A57_826977		:=	1
846f822cccSDouglas RaillardERRATA_A57_828024		:=	1
856f822cccSDouglas RaillardERRATA_A57_829520		:=	1
866f822cccSDouglas RaillardERRATA_A57_833471		:=	1
8796ff2601SEleanor BonniciERRATA_A57_859972		:=	0
886f822cccSDouglas Raillard
8996ff2601SEleanor Bonnici# Errata workarounds for Cortex-A72:
9096ff2601SEleanor BonniciERRATA_A72_859971		:=	0
9185135283SDan Handley
9285135283SDan Handley# Enable option to skip L1 data cache flush during the Cortex-A57 cluster
9385135283SDan Handley# power down sequence
9485135283SDan HandleySKIP_A57_L1_FLUSH_PWR_DWN	:=	 1
9585135283SDan Handley
9638dce70fSSoby Mathew# Disable the PSCI platform compatibility layer
9738dce70fSSoby MathewENABLE_PLAT_COMPAT		:= 	0
98c64a0448SVikram Kanigiri
99c64a0448SVikram Kanigiri# Enable memory map related constants optimisation
1000289970dSAntonio Nino DiazARM_BOARD_OPTIMISE_MEM		:=	1
10138dce70fSSoby Mathew
1023872fc2dSDavid Cunado# Do not enable SVE
1033872fc2dSDavid CunadoENABLE_SVE_FOR_NS		:=	0
1043872fc2dSDavid Cunado
105*01e808c6SSandrine Bailleux# Select SCMI/SDS drivers instead of SCPI/BOM driver for communicating with the
106*01e808c6SSandrine Bailleux# SCP during power management operations and for SCP RAM Firmware transfer.
107*01e808c6SSandrine BailleuxCSS_USE_SCMI_SDS_DRIVER		:=	1
108*01e808c6SSandrine Bailleux
10985135283SDan Handleyinclude plat/arm/board/common/board_css.mk
11085135283SDan Handleyinclude plat/arm/common/arm_common.mk
11185135283SDan Handleyinclude plat/arm/soc/common/soc_css.mk
11285135283SDan Handleyinclude plat/arm/css/common/css_common.mk
1131779ba6bSJuan Castillo
114