1 /* 2 * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <plat/common/platform.h> 8 #include <platform_def.h> 9 10 #include <css_pm.h> 11 #include <plat_arm.h> 12 #include "../../css/drivers/scmi/scmi.h" 13 #include "../../css/drivers/mhu/css_mhu_doorbell.h" 14 15 #if CSS_USE_SCMI_SDS_DRIVER 16 static scmi_channel_plat_info_t juno_scmi_plat_info = { 17 .scmi_mbx_mem = CSS_SCMI_PAYLOAD_BASE, 18 .db_reg_addr = PLAT_CSS_MHU_BASE + CSS_SCMI_MHU_DB_REG_OFF, 19 .db_preserve_mask = 0xfffffffe, 20 .db_modify_mask = 0x1, 21 .ring_doorbell = &mhu_ring_doorbell, 22 }; 23 24 scmi_channel_plat_info_t *plat_css_get_scmi_info() 25 { 26 return &juno_scmi_plat_info; 27 } 28 29 #endif 30 /* 31 * On Juno, the system power level is the highest power level. 32 * The first entry in the power domain descriptor specifies the 33 * number of system power domains i.e. 1. 34 */ 35 #define JUNO_PWR_DOMAINS_AT_MAX_PWR_LVL ARM_SYSTEM_COUNT 36 37 /* 38 * The Juno power domain tree descriptor. The cluster power domains 39 * are arranged so that when the PSCI generic code creates the power 40 * domain tree, the indices of the CPU power domain nodes it allocates 41 * match the linear indices returned by plat_core_pos_by_mpidr() 42 * i.e. CLUSTER1 CPUs are allocated indices from 0 to 3 and the higher 43 * indices for CLUSTER0 CPUs. 44 */ 45 static const unsigned char juno_power_domain_tree_desc[] = { 46 /* No of root nodes */ 47 JUNO_PWR_DOMAINS_AT_MAX_PWR_LVL, 48 /* No of children for the root node */ 49 JUNO_CLUSTER_COUNT, 50 /* No of children for the first cluster node */ 51 JUNO_CLUSTER1_CORE_COUNT, 52 /* No of children for the second cluster node */ 53 JUNO_CLUSTER0_CORE_COUNT 54 }; 55 56 /******************************************************************************* 57 * This function returns the Juno topology tree information. 58 ******************************************************************************/ 59 const unsigned char *plat_get_power_domain_tree_desc(void) 60 { 61 return juno_power_domain_tree_desc; 62 } 63 64 /******************************************************************************* 65 * This function returns the core count within the cluster corresponding to 66 * `mpidr`. 67 ******************************************************************************/ 68 unsigned int plat_arm_get_cluster_core_count(u_register_t mpidr) 69 { 70 return (((mpidr & (u_register_t) 0x100) != 0U) ? 71 JUNO_CLUSTER1_CORE_COUNT : JUNO_CLUSTER0_CORE_COUNT); 72 } 73 74 /* 75 * The array mapping platform core position (implemented by plat_my_core_pos()) 76 * to the SCMI power domain ID implemented by SCP. 77 */ 78 const uint32_t plat_css_core_pos_to_scmi_dmn_id_map[PLATFORM_CORE_COUNT] = { 79 2, 3, 4, 5, 0, 1 }; 80