1 /* 2 * Copyright (c) 2014-2015, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #include <mmio.h> 32 #include <nic_400.h> 33 #include <plat_arm.h> 34 #include <soc_css.h> 35 #include "juno_def.h" 36 37 38 /******************************************************************************* 39 * Set up the MMU-401 SSD tables. The power-on configuration has all stream IDs 40 * assigned to Non-Secure except some for the DMA-330. Assign those back to the 41 * Non-Secure world as well, otherwise EL1 may end up erroneously generating 42 * (untranslated) Secure transactions if it turns the SMMU on. 43 ******************************************************************************/ 44 static void init_mmu401(void) 45 { 46 uint32_t reg = mmio_read_32(MMU401_DMA330_BASE + MMU401_SSD_OFFSET); 47 reg |= 0x1FF; 48 mmio_write_32(MMU401_DMA330_BASE + MMU401_SSD_OFFSET, reg); 49 } 50 51 /******************************************************************************* 52 * Program CSS-NIC400 to allow non-secure access to some CSS regions. 53 ******************************************************************************/ 54 static void css_init_nic400(void) 55 { 56 /* Note: This is the NIC-400 device on the CSS */ 57 mmio_write_32(PLAT_SOC_CSS_NIC400_BASE + 58 NIC400_ADDR_CTRL_SECURITY_REG(CSS_NIC400_SLAVE_BOOTSECURE), 59 ~0); 60 } 61 62 /******************************************************************************* 63 * Initialize debug configuration. 64 ******************************************************************************/ 65 static void init_debug_cfg(void) 66 { 67 #if !DEBUG 68 /* Set internal drive selection for SPIDEN. */ 69 mmio_write_32(SSC_REG_BASE + SSC_DBGCFG_SET, 70 1U << SPIDEN_SEL_SET_SHIFT); 71 72 /* Drive SPIDEN LOW to disable invasive debug of secure state. */ 73 mmio_write_32(SSC_REG_BASE + SSC_DBGCFG_CLR, 74 1U << SPIDEN_INT_CLR_SHIFT); 75 #endif 76 } 77 78 /******************************************************************************* 79 * Initialize the secure environment. 80 ******************************************************************************/ 81 void plat_arm_security_setup(void) 82 { 83 /* Initialize debug configuration */ 84 init_debug_cfg(); 85 /* Initialize the TrustZone Controller */ 86 arm_tzc400_setup(); 87 /* Do ARM CSS internal NIC setup */ 88 css_init_nic400(); 89 /* Do ARM CSS SoC security setup */ 90 soc_css_security_setup(); 91 /* Initialize the SMMU SSD tables */ 92 init_mmu401(); 93 } 94