xref: /rk3399_ARM-atf/plat/arm/board/juno/juno_security.c (revision 31833aff6802a4b5bdc3b7007ce8b1871991e796)
1 /*
2  * Copyright (c) 2014-2015, ARM Limited and Contributors. All rights reserved.
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions are met:
6  *
7  * Redistributions of source code must retain the above copyright notice, this
8  * list of conditions and the following disclaimer.
9  *
10  * Redistributions in binary form must reproduce the above copyright notice,
11  * this list of conditions and the following disclaimer in the documentation
12  * and/or other materials provided with the distribution.
13  *
14  * Neither the name of ARM nor the names of its contributors may be used
15  * to endorse or promote products derived from this software without specific
16  * prior written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28  * POSSIBILITY OF SUCH DAMAGE.
29  */
30 
31 #include <mmio.h>
32 #include <plat_arm.h>
33 #include <soc_css.h>
34 #include "juno_def.h"
35 
36 
37 /*******************************************************************************
38  * Set up the MMU-401 SSD tables. The power-on configuration has all stream IDs
39  * assigned to Non-Secure except some for the DMA-330. Assign those back to the
40  * Non-Secure world as well, otherwise EL1 may end up erroneously generating
41  * (untranslated) Secure transactions if it turns the SMMU on.
42  ******************************************************************************/
43 static void init_mmu401(void)
44 {
45 	uint32_t reg = mmio_read_32(MMU401_DMA330_BASE + MMU401_SSD_OFFSET);
46 	reg |= 0x1FF;
47 	mmio_write_32(MMU401_DMA330_BASE + MMU401_SSD_OFFSET, reg);
48 }
49 
50 /*******************************************************************************
51  * Initialize the secure environment.
52  ******************************************************************************/
53 void plat_arm_security_setup(void)
54 {
55 	/* Initialize the TrustZone Controller */
56 	arm_tzc_setup();
57 	/* Do ARM CSS SoC security setup */
58 	soc_css_security_setup();
59 	/* Initialize the SMMU SSD tables*/
60 	init_mmu401();
61 }
62