1 /* 2 * Copyright (c) 2014-2023, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 #include <assert.h> 7 8 #include <common/debug.h> 9 #include <drivers/arm/nic_400.h> 10 #include <lib/mmio.h> 11 #include <platform_def.h> 12 #include <plat/arm/common/plat_arm.h> 13 #include <plat/arm/soc/common/soc_css.h> 14 #include <plat/common/platform.h> 15 16 #include "juno_tzmp1_def.h" 17 18 #ifdef JUNO_TZMP1 19 /* 20 * Protect buffer for VPU/GPU/DPU memory usage with hardware protection 21 * enabled. Propose 224MB video output, 96 MB video input and 32MB video 22 * private. 23 * 24 * Ind Memory Range Caption S_ATTR NS_ATTR 25 * 1 0x080000000 - 0x0E7FFFFFF ARM_NS_DRAM1 NONE RDWR | MEDIA_RW 26 * 2 0x0E8000000 - 0x0F5FFFFFF JUNO_MEDIA_TZC_PROT_DRAM1 NONE MEDIA_RW | AP_WR 27 * 3 0x0F6000000 - 0x0FBFFFFFF JUNO_VPU_TZC_PROT_DRAM1 RDWR VPU_PROT_RW 28 * 4 0x0FC000000 - 0x0FDFFFFFF JUNO_VPU_TZC_PRIV_DRAM1 RDWR VPU_PRIV_RW 29 * 5 0x0FE000000 - 0x0FEFFFFFF JUNO_AP_TZC_SHARE_DRAM1 NONE RDWR | MEDIA_RW 30 * 6 0x0FF000000 - 0x0FFFFFFFF ARM_AP_TZC_DRAM1 RDWR NONE 31 * 7 0x880000000 - 0x9FFFFFFFF ARM_DRAM2 NONE RDWR | MEDIA_RW 32 * 33 * Memory regions are neighbored to save limited TZC regions. Calculation 34 * started from ARM_TZC_SHARE_DRAM1 since it is known and fixed for both 35 * protected-enabled and protected-disabled settings. 36 * 37 * Video private buffer aheads of ARM_TZC_SHARE_DRAM1 38 */ 39 40 static const arm_tzc_regions_info_t juno_tzmp1_tzc_regions[] = { 41 {ARM_AP_TZC_DRAM1_BASE, ARM_AP_TZC_DRAM1_END, TZC_REGION_S_RDWR, 0}, 42 {JUNO_NS_DRAM1_PT1_BASE, JUNO_NS_DRAM1_PT1_END, 43 TZC_REGION_S_NONE, JUNO_MEDIA_TZC_NS_DEV_ACCESS}, 44 {JUNO_MEDIA_TZC_PROT_DRAM1_BASE, JUNO_MEDIA_TZC_PROT_DRAM1_END, 45 TZC_REGION_S_NONE, JUNO_MEDIA_TZC_PROT_ACCESS}, 46 {JUNO_VPU_TZC_PROT_DRAM1_BASE, JUNO_VPU_TZC_PROT_DRAM1_END, 47 TZC_REGION_S_RDWR, JUNO_VPU_TZC_PROT_ACCESS}, 48 {JUNO_VPU_TZC_PRIV_DRAM1_BASE, JUNO_VPU_TZC_PRIV_DRAM1_END, 49 TZC_REGION_S_RDWR, JUNO_VPU_TZC_PRIV_ACCESS}, 50 {JUNO_AP_TZC_SHARE_DRAM1_BASE, JUNO_AP_TZC_SHARE_DRAM1_END, 51 TZC_REGION_S_NONE, JUNO_MEDIA_TZC_NS_DEV_ACCESS}, 52 {ARM_DRAM2_BASE, ARM_DRAM2_END, 53 TZC_REGION_S_NONE, JUNO_MEDIA_TZC_NS_DEV_ACCESS}, 54 {}, 55 }; 56 57 /******************************************************************************* 58 * Program dp650 to configure NSAID value for protected mode. 59 ******************************************************************************/ 60 static void init_dp650(void) 61 { 62 mmio_write_32(DP650_BASE + DP650_PROT_NSAID_OFFSET, 63 DP650_PROT_NSAID_CONFIG); 64 } 65 66 /******************************************************************************* 67 * Program v550 to configure NSAID value for protected mode. 68 ******************************************************************************/ 69 static void init_v550(void) 70 { 71 /* 72 * bits[31:28] is for PRIVATE, 73 * bits[27:24] is for OUTBUF, 74 * bits[23:20] is for PROTECTED. 75 */ 76 mmio_write_32(V550_BASE + V550_PROTCTRL_OFFSET, V550_PROTCTRL_CONFIG); 77 } 78 79 #endif /* JUNO_TZMP1 */ 80 81 #ifdef JUNO_ETHOSN_TZMP1 82 /* 83 * Currently use the default regions defined in ARM_TZC_REGIONS_DEF. 84 * See the definition in /include/plat/arm/common/plat_arm.h 85 */ 86 static const arm_tzc_regions_info_t juno_ethosn_tzmp1_tzc_regions[] = { 87 ARM_TZC_REGIONS_DEF, /* See define in /include/plat/arm/common/plat_arm.h */ 88 {}, 89 }; 90 91 #endif /* JUNO_ETHOSN_TZMP1 */ 92 93 /******************************************************************************* 94 * Set up the MMU-401 SSD tables. The power-on configuration has all stream IDs 95 * assigned to Non-Secure except some for the DMA-330. Assign those back to the 96 * Non-Secure world as well, otherwise EL1 may end up erroneously generating 97 * (untranslated) Secure transactions if it turns the SMMU on. 98 ******************************************************************************/ 99 static void init_mmu401(void) 100 { 101 uint32_t reg = mmio_read_32(MMU401_DMA330_BASE + MMU401_SSD_OFFSET); 102 reg |= 0x1FF; 103 mmio_write_32(MMU401_DMA330_BASE + MMU401_SSD_OFFSET, reg); 104 } 105 106 /******************************************************************************* 107 * Program CSS-NIC400 to allow non-secure access to some CSS regions. 108 ******************************************************************************/ 109 static void css_init_nic400(void) 110 { 111 /* Note: This is the NIC-400 device on the CSS */ 112 mmio_write_32(PLAT_SOC_CSS_NIC400_BASE + 113 NIC400_ADDR_CTRL_SECURITY_REG(CSS_NIC400_SLAVE_BOOTSECURE), 114 ~0); 115 } 116 117 /******************************************************************************* 118 * Initialize debug configuration. 119 ******************************************************************************/ 120 static void init_debug_cfg(void) 121 { 122 #if !DEBUG 123 /* Set internal drive selection for SPIDEN. */ 124 mmio_write_32(SSC_REG_BASE + SSC_DBGCFG_SET, 125 1U << SPIDEN_SEL_SET_SHIFT); 126 127 /* Drive SPIDEN LOW to disable invasive debug of secure state. */ 128 mmio_write_32(SSC_REG_BASE + SSC_DBGCFG_CLR, 129 1U << SPIDEN_INT_CLR_SHIFT); 130 131 /* Set internal drive selection for SPNIDEN. */ 132 mmio_write_32(SSC_REG_BASE + SSC_DBGCFG_SET, 133 1U << SPNIDEN_SEL_SET_SHIFT); 134 135 /* Drive SPNIDEN LOW to disable non-invasive debug of secure state. */ 136 mmio_write_32(SSC_REG_BASE + SSC_DBGCFG_CLR, 137 1U << SPNIDEN_INT_CLR_SHIFT); 138 #endif 139 } 140 141 /******************************************************************************* 142 * Initialize the secure environment. 143 ******************************************************************************/ 144 void plat_arm_security_setup(void) 145 { 146 /* Initialize debug configuration */ 147 init_debug_cfg(); 148 /* Initialize the TrustZone Controller */ 149 #ifdef JUNO_TZMP1 150 arm_tzc400_setup(PLAT_ARM_TZC_BASE, juno_tzmp1_tzc_regions); 151 INFO("TZC protected shared memory base address for TZMP usecase: %p\n", 152 (void *)JUNO_AP_TZC_SHARE_DRAM1_BASE); 153 INFO("TZC protected shared memory end address for TZMP usecase: %p\n", 154 (void *)JUNO_AP_TZC_SHARE_DRAM1_END); 155 #elif defined(JUNO_ETHOSN_TZMP1) 156 arm_tzc400_setup(PLAT_ARM_TZC_BASE, juno_ethosn_tzmp1_tzc_regions); 157 INFO("TZC set up with default settings for NPU TZMP usecase\n"); 158 #else 159 arm_tzc400_setup(PLAT_ARM_TZC_BASE, NULL); 160 #endif 161 /* Do ARM CSS internal NIC setup */ 162 css_init_nic400(); 163 /* Do ARM CSS SoC security setup */ 164 soc_css_security_setup(); 165 /* Initialize the SMMU SSD tables */ 166 init_mmu401(); 167 #ifdef JUNO_TZMP1 168 init_dp650(); 169 init_v550(); 170 #endif 171 } 172 173 #if TRUSTED_BOARD_BOOT 174 int plat_get_mbedtls_heap(void **heap_addr, size_t *heap_size) 175 { 176 assert(heap_addr != NULL); 177 assert(heap_size != NULL); 178 179 return arm_get_mbedtls_heap(heap_addr, heap_size); 180 } 181 #endif 182