1 /* 2 * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <lib/smccc.h> 8 #include <platform_def.h> 9 #include <services/arm_arch_svc.h> 10 11 #include <plat/arm/common/plat_arm.h> 12 13 /* 14 * Table of memory regions for different BL stages to map using the MMU. 15 * This doesn't include Trusted SRAM as setup_page_tables() already takes care 16 * of mapping it. 17 */ 18 #ifdef IMAGE_BL1 19 const mmap_region_t plat_arm_mmap[] = { 20 ARM_MAP_SHARED_RAM, 21 V2M_MAP_FLASH0_RW, 22 V2M_MAP_IOFPGA, 23 CSS_MAP_DEVICE, 24 SOC_CSS_MAP_DEVICE, 25 #if TRUSTED_BOARD_BOOT 26 /* Map DRAM to authenticate NS_BL2U image. */ 27 ARM_MAP_NS_DRAM1, 28 #endif 29 {0} 30 }; 31 #endif 32 #ifdef IMAGE_BL2 33 const mmap_region_t plat_arm_mmap[] = { 34 ARM_MAP_SHARED_RAM, 35 V2M_MAP_FLASH0_RW, 36 #ifdef PLAT_ARM_MEM_PROT_ADDR 37 ARM_V2M_MAP_MEM_PROTECT, 38 #endif 39 V2M_MAP_IOFPGA, 40 CSS_MAP_DEVICE, 41 SOC_CSS_MAP_DEVICE, 42 ARM_MAP_NS_DRAM1, 43 #ifdef __aarch64__ 44 ARM_MAP_DRAM2, 45 #endif 46 #ifdef SPD_tspd 47 ARM_MAP_TSP_SEC_MEM, 48 #endif 49 #ifdef SPD_opteed 50 ARM_MAP_OPTEE_CORE_MEM, 51 ARM_OPTEE_PAGEABLE_LOAD_MEM, 52 #endif 53 #if TRUSTED_BOARD_BOOT && !BL2_AT_EL3 54 ARM_MAP_BL1_RW, 55 #endif 56 {0} 57 }; 58 #endif 59 #ifdef IMAGE_BL2U 60 const mmap_region_t plat_arm_mmap[] = { 61 ARM_MAP_SHARED_RAM, 62 CSS_MAP_DEVICE, 63 CSS_MAP_SCP_BL2U, 64 V2M_MAP_IOFPGA, 65 SOC_CSS_MAP_DEVICE, 66 {0} 67 }; 68 #endif 69 #ifdef IMAGE_BL31 70 const mmap_region_t plat_arm_mmap[] = { 71 ARM_MAP_SHARED_RAM, 72 V2M_MAP_IOFPGA, 73 CSS_MAP_DEVICE, 74 #ifdef PLAT_ARM_MEM_PROT_ADDR 75 ARM_V2M_MAP_MEM_PROTECT, 76 #endif 77 SOC_CSS_MAP_DEVICE, 78 {0} 79 }; 80 #endif 81 #ifdef IMAGE_BL32 82 const mmap_region_t plat_arm_mmap[] = { 83 #ifndef __aarch64__ 84 ARM_MAP_SHARED_RAM, 85 #ifdef PLAT_ARM_MEM_PROT_ADDR 86 ARM_V2M_MAP_MEM_PROTECT, 87 #endif 88 #endif 89 V2M_MAP_IOFPGA, 90 CSS_MAP_DEVICE, 91 SOC_CSS_MAP_DEVICE, 92 {0} 93 }; 94 #endif 95 96 ARM_CASSERT_MMAP 97 98 /***************************************************************************** 99 * plat_is_smccc_feature_available() - This function checks whether SMCCC 100 * feature is availabile for platform. 101 * @fid: SMCCC function id 102 * 103 * Return SMC_ARCH_CALL_SUCCESS if SMCCC feature is available and 104 * SMC_ARCH_CALL_NOT_SUPPORTED otherwise. 105 *****************************************************************************/ 106 int32_t plat_is_smccc_feature_available(u_register_t fid) 107 { 108 switch (fid) { 109 case SMCCC_ARCH_SOC_ID: 110 return SMC_ARCH_CALL_SUCCESS; 111 default: 112 return SMC_ARCH_CALL_NOT_SUPPORTED; 113 } 114 } 115 116 /* Get SOC version */ 117 int32_t plat_get_soc_version(void) 118 { 119 return (int32_t) 120 ((ARM_SOC_IDENTIFICATION_CODE << ARM_SOC_IDENTIFICATION_SHIFT) 121 | (ARM_SOC_CONTINUATION_CODE << ARM_SOC_CONTINUATION_SHIFT) 122 | JUNO_SOC_ID); 123 } 124 125 /* Get SOC revision */ 126 int32_t plat_get_soc_revision(void) 127 { 128 unsigned int sys_id; 129 130 sys_id = mmio_read_32(V2M_SYSREGS_BASE + V2M_SYS_ID); 131 return (int32_t)((sys_id >> V2M_SYS_ID_REV_SHIFT) & 132 V2M_SYS_ID_REV_MASK); 133 } 134