1# 2# Copyright (c) 2019, Arm Limited. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7ifdef ARM_CORTEX_A5 8# Use the SP804 timer instead of the generic one 9FVP_VE_USE_SP804_TIMER := 1 10$(eval $(call add_define,FVP_VE_USE_SP804_TIMER)) 11BL2_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 12endif 13 14FVP_VE_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ 15 drivers/arm/gic/v2/gicv2_main.c \ 16 drivers/arm/gic/v2/gicv2_helpers.c \ 17 plat/common/plat_gicv2.c \ 18 plat/arm/common/arm_gicv2.c 19 20FVP_VE_SECURITY_SOURCES := plat/arm/board/fvp_ve/fvp_ve_security.c 21 22PLAT_INCLUDES := -Iplat/arm/board/fvp_ve/include 23 24PLAT_BL_COMMON_SOURCES := plat/arm/board/fvp_ve/fvp_ve_common.c \ 25 plat/arm/common/${ARCH}/arm_helpers.S \ 26 plat/arm/common/arm_common.c \ 27 plat/arm/common/arm_console.c \ 28 drivers/arm/pl011/${ARCH}/pl011_console.S \ 29 plat/arm/board/common/${ARCH}/board_arm_helpers.S 30 31ifdef ARM_CORTEX_A5 32FVP_VE_CPU_LIBS := lib/cpus/aarch32/cortex_a5.S 33else 34FVP_VE_CPU_LIBS := lib/cpus/aarch32/cortex_a7.S 35endif 36 37BL1_SOURCES += drivers/arm/sp805/sp805.c \ 38 drivers/io/io_fip.c \ 39 drivers/io/io_memmap.c \ 40 drivers/io/io_storage.c \ 41 plat/arm/common/arm_bl1_setup.c \ 42 plat/arm/common/arm_err.c \ 43 plat/arm/common/arm_io_storage.c \ 44 drivers/cfi/v2m/v2m_flash.c \ 45 plat/arm/board/fvp_ve/${ARCH}/fvp_ve_helpers.S \ 46 plat/arm/board/fvp_ve/fvp_ve_bl1_setup.c \ 47 lib/aarch32/arm32_aeabi_divmod.c \ 48 lib/aarch32/arm32_aeabi_divmod_a32.S \ 49 ${FVP_VE_CPU_LIBS} \ 50 ${DYN_CFG_SOURCES} 51 52BL2_SOURCES += plat/arm/board/fvp_ve/fvp_ve_bl2_setup.c \ 53 lib/aarch32/arm32_aeabi_divmod.c \ 54 lib/aarch32/arm32_aeabi_divmod_a32.S \ 55 drivers/delay_timer/delay_timer.c \ 56 drivers/delay_timer/generic_delay_timer.c \ 57 drivers/cfi/v2m/v2m_flash.c \ 58 drivers/io/io_fip.c \ 59 drivers/io/io_memmap.c \ 60 drivers/io/io_storage.c \ 61 plat/arm/common/arm_bl2_setup.c \ 62 plat/arm/common/arm_err.c \ 63 plat/arm/common/arm_io_storage.c \ 64 plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c \ 65 plat/arm/common/arm_image_load.c \ 66 common/desc_image_load.c \ 67 ${DYN_CFG_SOURCES} \ 68 ${FVP_VE_SECURITY_SOURCES} 69 70# Add the FDT_SOURCES and options for Dynamic Config (only for Unix env) 71ifdef UNIX_MK 72 73FDT_SOURCES += plat/arm/board/fvp_ve/fdts/fvp_ve_tb_fw_config.dts 74 75FVP_TB_FW_CONFIG := ${BUILD_PLAT}/fdts/fvp_ve_tb_fw_config.dtb 76 77# Add the TB_FW_CONFIG to FIP and specify the same to certtool 78$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TB_FW_CONFIG},--tb-fw-config)) 79 80FDT_SOURCES += ${FVP_HW_CONFIG_DTS} 81$(eval FVP_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb, \ 82 fdts/$(notdir ${FVP_HW_CONFIG_DTS}))) 83# Add the HW_CONFIG to FIP and specify the same to certtool 84$(eval $(call TOOL_ADD_PAYLOAD,${FVP_HW_CONFIG},--hw-config)) 85endif 86 87NEED_BL32 := yes 88 89# Modification of arm_common.mk 90 91# Process ARM_DISABLE_TRUSTED_WDOG flag 92# By default, Trusted Watchdog is always enabled unless SPIN_ON_BL1_EXIT is set 93ARM_DISABLE_TRUSTED_WDOG := 0 94ifeq (${SPIN_ON_BL1_EXIT}, 1) 95ARM_DISABLE_TRUSTED_WDOG := 1 96endif 97$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG)) 98$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG)) 99 100# Use translation tables library v1 if using Cortex-A5 101ifdef ARM_CORTEX_A5 102ARM_XLAT_TABLES_LIB_V1 := 1 103else 104ARM_XLAT_TABLES_LIB_V1 := 0 105endif 106$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1)) 107$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1)) 108 109ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1) 110 # Only use nonlpae version of xlatv1 otherwise use xlat v2 111 PLAT_BL_COMMON_SOURCES += lib/xlat_tables/${ARCH}/nonlpae_tables.c 112else 113 include lib/xlat_tables_v2/xlat_tables.mk 114 PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS} 115endif 116 117# Add `libfdt` and Arm common helpers required for Dynamic Config 118include lib/libfdt/libfdt.mk 119 120DYN_CFG_SOURCES += plat/arm/common/arm_dyn_cfg.c \ 121 plat/arm/common/arm_dyn_cfg_helpers.c \ 122 common/fdt_wrappers.c 123 124