1# 2# Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7# Use the GICv3 driver on the FVP by default 8FVP_USE_GIC_DRIVER := FVP_GICV3 9 10# Use the SP804 timer instead of the generic one 11FVP_USE_SP804_TIMER := 0 12 13# Default cluster count for FVP 14FVP_CLUSTER_COUNT := 2 15 16# Default number of CPUs per cluster on FVP 17FVP_MAX_CPUS_PER_CLUSTER := 4 18 19# Default number of threads per CPU on FVP 20FVP_MAX_PE_PER_CPU := 1 21 22FVP_DT_PREFIX := fvp-base-gicv3-psci 23 24$(eval $(call assert_boolean,FVP_USE_SP804_TIMER)) 25$(eval $(call add_define,FVP_USE_SP804_TIMER)) 26 27# The FVP platform depends on this macro to build with correct GIC driver. 28$(eval $(call add_define,FVP_USE_GIC_DRIVER)) 29 30# Pass FVP_CLUSTER_COUNT to the build system. 31$(eval $(call add_define,FVP_CLUSTER_COUNT)) 32 33# Pass FVP_MAX_CPUS_PER_CLUSTER to the build system. 34$(eval $(call add_define,FVP_MAX_CPUS_PER_CLUSTER)) 35 36# Pass FVP_MAX_PE_PER_CPU to the build system. 37$(eval $(call add_define,FVP_MAX_PE_PER_CPU)) 38 39# Sanity check the cluster count and if FVP_CLUSTER_COUNT <= 2, 40# choose the CCI driver , else the CCN driver 41ifeq ($(FVP_CLUSTER_COUNT), 0) 42$(error "Incorrect cluster count specified for FVP port") 43else ifeq ($(FVP_CLUSTER_COUNT),$(filter $(FVP_CLUSTER_COUNT),1 2)) 44FVP_INTERCONNECT_DRIVER := FVP_CCI 45else 46FVP_INTERCONNECT_DRIVER := FVP_CCN 47endif 48 49$(eval $(call add_define,FVP_INTERCONNECT_DRIVER)) 50 51FVP_GICV3_SOURCES := drivers/arm/gic/common/gic_common.c \ 52 drivers/arm/gic/v3/gicv3_main.c \ 53 drivers/arm/gic/v3/gicv3_helpers.c \ 54 plat/common/plat_gicv3.c \ 55 plat/arm/common/arm_gicv3.c 56 57# Choose the GIC sources depending upon the how the FVP will be invoked 58ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV3) 59FVP_GIC_SOURCES := ${FVP_GICV3_SOURCES} \ 60 drivers/arm/gic/v3/gic500.c 61else ifeq (${FVP_USE_GIC_DRIVER},FVP_GIC600) 62FVP_GIC_SOURCES := ${FVP_GICV3_SOURCES} \ 63 drivers/arm/gic/v3/gic600.c 64else ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV2) 65FVP_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ 66 drivers/arm/gic/v2/gicv2_main.c \ 67 drivers/arm/gic/v2/gicv2_helpers.c \ 68 plat/common/plat_gicv2.c \ 69 plat/arm/common/arm_gicv2.c 70 71FVP_DT_PREFIX := fvp-base-gicv2-psci 72else 73$(error "Incorrect GIC driver chosen on FVP port") 74endif 75 76ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCI) 77FVP_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c 78else ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCN) 79FVP_INTERCONNECT_SOURCES := drivers/arm/ccn/ccn.c \ 80 plat/arm/common/arm_ccn.c 81else 82$(error "Incorrect CCN driver chosen on FVP port") 83endif 84 85FVP_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \ 86 plat/arm/board/fvp/fvp_security.c \ 87 plat/arm/common/arm_tzc400.c 88 89 90PLAT_INCLUDES := -Iplat/arm/board/fvp/include 91 92 93PLAT_BL_COMMON_SOURCES := plat/arm/board/fvp/fvp_common.c 94 95FVP_CPU_LIBS := lib/cpus/${ARCH}/aem_generic.S 96 97ifeq (${ARCH}, aarch64) 98FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a35.S \ 99 lib/cpus/aarch64/cortex_a53.S \ 100 lib/cpus/aarch64/cortex_a55.S \ 101 lib/cpus/aarch64/cortex_a57.S \ 102 lib/cpus/aarch64/cortex_a72.S \ 103 lib/cpus/aarch64/cortex_a73.S \ 104 lib/cpus/aarch64/cortex_a75.S \ 105 lib/cpus/aarch64/cortex_a76.S \ 106 lib/cpus/aarch64/cortex_ares.S \ 107 lib/cpus/aarch64/cortex_deimos.S 108else 109FVP_CPU_LIBS += lib/cpus/aarch32/cortex_a32.S 110endif 111 112BL1_SOURCES += drivers/io/io_semihosting.c \ 113 lib/semihosting/semihosting.c \ 114 lib/semihosting/${ARCH}/semihosting_call.S \ 115 plat/arm/board/fvp/${ARCH}/fvp_helpers.S \ 116 plat/arm/board/fvp/fvp_bl1_setup.c \ 117 plat/arm/board/fvp/fvp_io_storage.c \ 118 plat/arm/board/fvp/fvp_trusted_boot.c \ 119 ${FVP_CPU_LIBS} \ 120 ${FVP_INTERCONNECT_SOURCES} 121 122 123BL2_SOURCES += drivers/io/io_semihosting.c \ 124 lib/utils/mem_region.c \ 125 lib/semihosting/semihosting.c \ 126 lib/semihosting/${ARCH}/semihosting_call.S \ 127 plat/arm/board/fvp/fvp_bl2_setup.c \ 128 plat/arm/board/fvp/fvp_io_storage.c \ 129 plat/arm/board/fvp/fvp_trusted_boot.c \ 130 plat/arm/common/arm_nor_psci_mem_protect.c \ 131 ${FVP_SECURITY_SOURCES} 132 133 134 135ifeq (${BL2_AT_EL3},1) 136BL2_SOURCES += plat/arm/board/fvp/${ARCH}/fvp_helpers.S \ 137 plat/arm/board/fvp/fvp_bl2_el3_setup.c \ 138 ${FVP_CPU_LIBS} \ 139 ${FVP_INTERCONNECT_SOURCES} 140endif 141 142ifeq (${FVP_USE_SP804_TIMER},1) 143BL2_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 144endif 145 146BL2U_SOURCES += plat/arm/board/fvp/fvp_bl2u_setup.c \ 147 ${FVP_SECURITY_SOURCES} 148 149BL31_SOURCES += drivers/arm/smmu/smmu_v3.c \ 150 drivers/cfi/v2m/v2m_flash.c \ 151 lib/utils/mem_region.c \ 152 plat/arm/board/fvp/fvp_bl31_setup.c \ 153 plat/arm/board/fvp/fvp_pm.c \ 154 plat/arm/board/fvp/fvp_topology.c \ 155 plat/arm/board/fvp/aarch64/fvp_helpers.S \ 156 plat/arm/board/fvp/drivers/pwrc/fvp_pwrc.c \ 157 plat/arm/common/arm_nor_psci_mem_protect.c \ 158 ${FVP_CPU_LIBS} \ 159 ${FVP_GIC_SOURCES} \ 160 ${FVP_INTERCONNECT_SOURCES} \ 161 ${FVP_SECURITY_SOURCES} 162 163# Add the FDT_SOURCES and options for Dynamic Config (only for Unix env) 164ifdef UNIX_MK 165FVP_HW_CONFIG_DTS := fdts/${FVP_DT_PREFIX}.dts 166FDT_SOURCES += $(addprefix plat/arm/board/fvp/fdts/, \ 167 ${PLAT}_tb_fw_config.dts \ 168 ${PLAT}_soc_fw_config.dts \ 169 ${PLAT}_nt_fw_config.dts \ 170 ) 171 172FVP_TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb 173FVP_SOC_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_soc_fw_config.dtb 174FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb 175 176ifeq (${SPD},tspd) 177FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_tsp_fw_config.dts 178FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tsp_fw_config.dtb 179 180# Add the TOS_FW_CONFIG to FIP and specify the same to certtool 181$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config)) 182endif 183 184# Add the TB_FW_CONFIG to FIP and specify the same to certtool 185$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TB_FW_CONFIG},--tb-fw-config)) 186# Add the SOC_FW_CONFIG to FIP and specify the same to certtool 187$(eval $(call TOOL_ADD_PAYLOAD,${FVP_SOC_FW_CONFIG},--soc-fw-config)) 188# Add the NT_FW_CONFIG to FIP and specify the same to certtool 189$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config)) 190 191FDT_SOURCES += ${FVP_HW_CONFIG_DTS} 192$(eval FVP_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(FVP_HW_CONFIG_DTS))) 193 194# Add the HW_CONFIG to FIP and specify the same to certtool 195$(eval $(call TOOL_ADD_PAYLOAD,${FVP_HW_CONFIG},--hw-config)) 196endif 197 198# Enable Activity Monitor Unit extensions by default 199ENABLE_AMU := 1 200 201# Enable dynamic mitigation support by default 202DYNAMIC_WORKAROUND_CVE_2018_3639 := 1 203 204ifneq (${RESET_TO_BL31},1) 205# Enable reclaiming of BL31 initialisation code for secondary cores stacks for 206# FVP. We cannot enable PIE for this case because the overlayed init section 207# creates some dynamic relocations which cannot be handled by the fixup 208# logic currently. 209RECLAIM_INIT_CODE := 1 210else 211# Enable PIE support when RESET_TO_BL31=1 212ENABLE_PIE := 1 213endif 214 215ifeq (${ENABLE_AMU},1) 216BL31_SOURCES += lib/cpus/aarch64/cortex_a75_pubsub.c \ 217 lib/cpus/aarch64/cortex_ares_pubsub.c \ 218 lib/cpus/aarch64/cpuamu.c \ 219 lib/cpus/aarch64/cpuamu_helpers.S 220endif 221 222ifeq (${RAS_EXTENSION},1) 223BL31_SOURCES += plat/arm/board/fvp/aarch64/fvp_ras.c 224endif 225 226ifneq (${ENABLE_STACK_PROTECTOR},0) 227PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_stack_protector.c 228endif 229 230ifeq (${ARCH},aarch32) 231 NEED_BL32 := yes 232endif 233 234# Add support for platform supplied linker script for BL31 build 235$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT)) 236 237ifneq (${BL2_AT_EL3}, 0) 238 override BL1_SOURCES = 239endif 240 241include plat/arm/board/common/board_common.mk 242include plat/arm/common/arm_common.mk 243 244# FVP being a development platform, enable capability to disable Authentication 245# dynamically if TRUSTED_BOARD_BOOT is set. 246ifeq (${TRUSTED_BOARD_BOOT}, 1) 247 DYN_DISABLE_AUTH := 1 248endif 249