xref: /rk3399_ARM-atf/plat/arm/board/fvp/include/plat_macros.S (revision 3fc4124c7513554dc14a83a0b94010ce771e7e1c)
1*3fc4124cSDan Handley/*
2*3fc4124cSDan Handley * Copyright (c) 2014-2015, ARM Limited and Contributors. All rights reserved.
3*3fc4124cSDan Handley *
4*3fc4124cSDan Handley * Redistribution and use in source and binary forms, with or without
5*3fc4124cSDan Handley * modification, are permitted provided that the following conditions are met:
6*3fc4124cSDan Handley *
7*3fc4124cSDan Handley * Redistributions of source code must retain the above copyright notice, this
8*3fc4124cSDan Handley * list of conditions and the following disclaimer.
9*3fc4124cSDan Handley *
10*3fc4124cSDan Handley * Redistributions in binary form must reproduce the above copyright notice,
11*3fc4124cSDan Handley * this list of conditions and the following disclaimer in the documentation
12*3fc4124cSDan Handley * and/or other materials provided with the distribution.
13*3fc4124cSDan Handley *
14*3fc4124cSDan Handley * Neither the name of ARM nor the names of its contributors may be used
15*3fc4124cSDan Handley * to endorse or promote products derived from this software without specific
16*3fc4124cSDan Handley * prior written permission.
17*3fc4124cSDan Handley *
18*3fc4124cSDan Handley * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19*3fc4124cSDan Handley * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20*3fc4124cSDan Handley * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21*3fc4124cSDan Handley * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22*3fc4124cSDan Handley * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23*3fc4124cSDan Handley * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24*3fc4124cSDan Handley * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25*3fc4124cSDan Handley * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26*3fc4124cSDan Handley * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27*3fc4124cSDan Handley * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28*3fc4124cSDan Handley * POSSIBILITY OF SUCH DAMAGE.
29*3fc4124cSDan Handley */
30*3fc4124cSDan Handley#ifndef __PLAT_MACROS_S__
31*3fc4124cSDan Handley#define __PLAT_MACROS_S__
32*3fc4124cSDan Handley
33*3fc4124cSDan Handley#include <arm_macros.S>
34*3fc4124cSDan Handley#include <v2m_def.h>
35*3fc4124cSDan Handley#include "../fvp_def.h"
36*3fc4124cSDan Handley
37*3fc4124cSDan Handley	/* ---------------------------------------------
38*3fc4124cSDan Handley	 * The below required platform porting macro
39*3fc4124cSDan Handley	 * prints out relevant GIC registers whenever an
40*3fc4124cSDan Handley	 * unhandled exception is taken in BL3-1.
41*3fc4124cSDan Handley	 * Clobbers: x0 - x10, x16, x17, sp
42*3fc4124cSDan Handley	 * ---------------------------------------------
43*3fc4124cSDan Handley	 */
44*3fc4124cSDan Handley	.macro plat_print_gic_regs
45*3fc4124cSDan Handley	/*
46*3fc4124cSDan Handley	 * Detect if we're using the base memory map or
47*3fc4124cSDan Handley	 * the legacy VE memory map
48*3fc4124cSDan Handley	 */
49*3fc4124cSDan Handley	mov_imm	x0, (V2M_SYSREGS_BASE + V2M_SYS_ID)
50*3fc4124cSDan Handley	ldr	w16, [x0]
51*3fc4124cSDan Handley	/* Extract BLD (12th - 15th bits) from the SYS_ID */
52*3fc4124cSDan Handley	ubfx	x16, x16, #V2M_SYS_ID_BLD_SHIFT, #4
53*3fc4124cSDan Handley	/* Check if VE mmap */
54*3fc4124cSDan Handley	cmp	w16, #BLD_GIC_VE_MMAP
55*3fc4124cSDan Handley	b.eq	use_ve_mmap
56*3fc4124cSDan Handley	/* Check if Cortex-A53/A57 mmap */
57*3fc4124cSDan Handley	cmp	w16, #BLD_GIC_A53A57_MMAP
58*3fc4124cSDan Handley	b.ne	exit_print_gic_regs
59*3fc4124cSDan Handley	mov_imm	x17, BASE_GICC_BASE
60*3fc4124cSDan Handley	mov_imm	x16, BASE_GICD_BASE
61*3fc4124cSDan Handley	b	print_gicc_regs
62*3fc4124cSDan Handleyuse_ve_mmap:
63*3fc4124cSDan Handley	mov_imm	x17, VE_GICC_BASE
64*3fc4124cSDan Handley	mov_imm	x16, VE_GICD_BASE
65*3fc4124cSDan Handleyprint_gicc_regs:
66*3fc4124cSDan Handley	arm_print_gic_regs
67*3fc4124cSDan Handley	.endm
68*3fc4124cSDan Handley
69*3fc4124cSDan Handley#endif /* __PLAT_MACROS_S__ */
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