xref: /rk3399_ARM-atf/plat/arm/board/fvp/fvp_topology.c (revision fd6007de64fd7e16f6d96972643434c04a77f1c6)
1 /*
2  * Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions are met:
6  *
7  * Redistributions of source code must retain the above copyright notice, this
8  * list of conditions and the following disclaimer.
9  *
10  * Redistributions in binary form must reproduce the above copyright notice,
11  * this list of conditions and the following disclaimer in the documentation
12  * and/or other materials provided with the distribution.
13  *
14  * Neither the name of ARM nor the names of its contributors may be used
15  * to endorse or promote products derived from this software without specific
16  * prior written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28  * POSSIBILITY OF SUCH DAMAGE.
29  */
30 
31 #include <arch.h>
32 #include <plat_arm.h>
33 #include <platform_def.h>
34 #include "drivers/pwrc/fvp_pwrc.h"
35 
36 /*
37  * The FVP power domain tree does not have a single system level power domain
38  * i.e. a single root node. The first entry in the power domain descriptor
39  * specifies the number of power domains at the highest power level. For the FVP
40  * this is 2 i.e. the number of cluster power domains.
41  */
42 #define FVP_PWR_DOMAINS_AT_MAX_PWR_LVL	ARM_CLUSTER_COUNT
43 
44 /* The FVP power domain tree descriptor */
45 const unsigned char arm_power_domain_tree_desc[] = {
46 	/* No of root nodes */
47 	FVP_PWR_DOMAINS_AT_MAX_PWR_LVL,
48 	/* No of children for the first node */
49 	PLAT_ARM_CLUSTER0_CORE_COUNT,
50 	/* No of children for the second node */
51 	PLAT_ARM_CLUSTER1_CORE_COUNT
52 };
53 
54 /*******************************************************************************
55  * This function implements a part of the critical interface between the psci
56  * generic layer and the platform that allows the former to query the platform
57  * to convert an MPIDR to a unique linear index. An error code (-1) is returned
58  * in case the MPIDR is invalid.
59  ******************************************************************************/
60 int plat_core_pos_by_mpidr(u_register_t mpidr)
61 {
62 	if (arm_check_mpidr(mpidr) == -1)
63 		return -1;
64 
65 	if (fvp_pwrc_read_psysr(mpidr) == PSYSR_INVALID)
66 		return -1;
67 
68 	return plat_arm_calc_core_pos(mpidr);
69 }
70