1 /* 2 * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <platform_def.h> 8 9 #include <arch.h> 10 #include <drivers/arm/fvp/fvp_pwrc.h> 11 #include <lib/cassert.h> 12 #include <plat/arm/common/arm_config.h> 13 #include <plat/arm/common/plat_arm.h> 14 #include <plat/common/platform.h> 15 16 /* The FVP power domain tree descriptor */ 17 static unsigned char fvp_power_domain_tree_desc[FVP_CLUSTER_COUNT + 2]; 18 19 20 CASSERT(((FVP_CLUSTER_COUNT > 0) && (FVP_CLUSTER_COUNT <= 256)), 21 assert_invalid_fvp_cluster_count); 22 23 /******************************************************************************* 24 * This function dynamically constructs the topology according to 25 * FVP_CLUSTER_COUNT and returns it. 26 ******************************************************************************/ 27 const unsigned char *plat_get_power_domain_tree_desc(void) 28 { 29 int i; 30 31 /* 32 * The highest level is the system level. The next level is constituted 33 * by clusters and then cores in clusters. 34 */ 35 fvp_power_domain_tree_desc[0] = 1; 36 fvp_power_domain_tree_desc[1] = FVP_CLUSTER_COUNT; 37 38 for (i = 0; i < FVP_CLUSTER_COUNT; i++) 39 fvp_power_domain_tree_desc[i + 2] = FVP_MAX_CPUS_PER_CLUSTER; 40 41 42 return fvp_power_domain_tree_desc; 43 } 44 45 /******************************************************************************* 46 * This function returns the core count within the cluster corresponding to 47 * `mpidr`. 48 ******************************************************************************/ 49 unsigned int plat_arm_get_cluster_core_count(u_register_t mpidr) 50 { 51 return FVP_MAX_CPUS_PER_CLUSTER; 52 } 53 54 /******************************************************************************* 55 * This function implements a part of the critical interface between the psci 56 * generic layer and the platform that allows the former to query the platform 57 * to convert an MPIDR to a unique linear index. An error code (-1) is returned 58 * in case the MPIDR is invalid. 59 ******************************************************************************/ 60 int plat_core_pos_by_mpidr(u_register_t mpidr) 61 { 62 unsigned int clus_id, cpu_id, thread_id; 63 64 /* Validate affinity fields */ 65 if ((arm_config.flags & ARM_CONFIG_FVP_SHIFTED_AFF) != 0U) { 66 thread_id = MPIDR_AFFLVL0_VAL(mpidr); 67 cpu_id = MPIDR_AFFLVL1_VAL(mpidr); 68 clus_id = MPIDR_AFFLVL2_VAL(mpidr); 69 } else { 70 thread_id = 0; 71 cpu_id = MPIDR_AFFLVL0_VAL(mpidr); 72 clus_id = MPIDR_AFFLVL1_VAL(mpidr); 73 } 74 75 if (clus_id >= FVP_CLUSTER_COUNT) 76 return -1; 77 if (cpu_id >= FVP_MAX_CPUS_PER_CLUSTER) 78 return -1; 79 if (thread_id >= FVP_MAX_PE_PER_CPU) 80 return -1; 81 82 if (fvp_pwrc_read_psysr(mpidr) == PSYSR_INVALID) 83 return -1; 84 85 /* 86 * Core position calculation for FVP platform depends on the MT bit in 87 * MPIDR. This function cannot assume that the supplied MPIDR has the MT 88 * bit set even if the implementation has. For example, PSCI clients 89 * might supply MPIDR values without the MT bit set. Therefore, we 90 * inject the current PE's MT bit so as to get the calculation correct. 91 * This of course assumes that none or all CPUs on the platform has MT 92 * bit set. 93 */ 94 mpidr |= (read_mpidr_el1() & MPIDR_MT_MASK); 95 return (int) plat_arm_calc_core_pos(mpidr); 96 } 97