xref: /rk3399_ARM-atf/plat/arm/board/fvp/fvp_topology.c (revision 38dce70f51fb83b27958ba3e2ad15f5635cb1061)
13fc4124cSDan Handley /*
23fc4124cSDan Handley  * Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
33fc4124cSDan Handley  *
43fc4124cSDan Handley  * Redistribution and use in source and binary forms, with or without
53fc4124cSDan Handley  * modification, are permitted provided that the following conditions are met:
63fc4124cSDan Handley  *
73fc4124cSDan Handley  * Redistributions of source code must retain the above copyright notice, this
83fc4124cSDan Handley  * list of conditions and the following disclaimer.
93fc4124cSDan Handley  *
103fc4124cSDan Handley  * Redistributions in binary form must reproduce the above copyright notice,
113fc4124cSDan Handley  * this list of conditions and the following disclaimer in the documentation
123fc4124cSDan Handley  * and/or other materials provided with the distribution.
133fc4124cSDan Handley  *
143fc4124cSDan Handley  * Neither the name of ARM nor the names of its contributors may be used
153fc4124cSDan Handley  * to endorse or promote products derived from this software without specific
163fc4124cSDan Handley  * prior written permission.
173fc4124cSDan Handley  *
183fc4124cSDan Handley  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
193fc4124cSDan Handley  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
203fc4124cSDan Handley  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
213fc4124cSDan Handley  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
223fc4124cSDan Handley  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
233fc4124cSDan Handley  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
243fc4124cSDan Handley  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
253fc4124cSDan Handley  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
263fc4124cSDan Handley  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
273fc4124cSDan Handley  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
283fc4124cSDan Handley  * POSSIBILITY OF SUCH DAMAGE.
293fc4124cSDan Handley  */
303fc4124cSDan Handley 
313fc4124cSDan Handley #include <arch.h>
32*38dce70fSSoby Mathew #include <plat_arm.h>
333fc4124cSDan Handley #include <platform_def.h>
343fc4124cSDan Handley #include "drivers/pwrc/fvp_pwrc.h"
353fc4124cSDan Handley 
36*38dce70fSSoby Mathew /*
37*38dce70fSSoby Mathew  * The FVP power domain tree does not have a single system level power domain
38*38dce70fSSoby Mathew  * i.e. a single root node. The first entry in the power domain descriptor
39*38dce70fSSoby Mathew  * specifies the number of power domains at the highest power level. For the FVP
40*38dce70fSSoby Mathew  * this is 2 i.e. the number of cluster power domains.
41*38dce70fSSoby Mathew  */
42*38dce70fSSoby Mathew #define FVP_PWR_DOMAINS_AT_MAX_PWR_LVL	ARM_CLUSTER_COUNT
433fc4124cSDan Handley 
44*38dce70fSSoby Mathew /* The FVP power domain tree descriptor */
45*38dce70fSSoby Mathew const unsigned char arm_power_domain_tree_desc[] = {
46*38dce70fSSoby Mathew 	/* No of root nodes */
47*38dce70fSSoby Mathew 	FVP_PWR_DOMAINS_AT_MAX_PWR_LVL,
48*38dce70fSSoby Mathew 	/* No of children for the first node */
49*38dce70fSSoby Mathew 	PLAT_ARM_CLUSTER0_CORE_COUNT,
50*38dce70fSSoby Mathew 	/* No of children for the second node */
51*38dce70fSSoby Mathew 	PLAT_ARM_CLUSTER1_CORE_COUNT
52*38dce70fSSoby Mathew };
533fc4124cSDan Handley 
543fc4124cSDan Handley /*******************************************************************************
553fc4124cSDan Handley  * This function implements a part of the critical interface between the psci
56*38dce70fSSoby Mathew  * generic layer and the platform that allows the former to query the platform
57*38dce70fSSoby Mathew  * to convert an MPIDR to a unique linear index. An error code (-1) is returned
58*38dce70fSSoby Mathew  * in case the MPIDR is invalid.
593fc4124cSDan Handley  ******************************************************************************/
60*38dce70fSSoby Mathew int plat_core_pos_by_mpidr(u_register_t mpidr)
613fc4124cSDan Handley {
62*38dce70fSSoby Mathew 	if (arm_check_mpidr(mpidr) == -1)
63*38dce70fSSoby Mathew 		return -1;
643fc4124cSDan Handley 
65*38dce70fSSoby Mathew 	if (fvp_pwrc_read_psysr(mpidr) == PSYSR_INVALID)
66*38dce70fSSoby Mathew 		return -1;
673fc4124cSDan Handley 
68*38dce70fSSoby Mathew 	return plat_arm_calc_core_pos(mpidr);
693fc4124cSDan Handley }
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