xref: /rk3399_ARM-atf/plat/arm/board/fvp/fvp_topology.c (revision 11ad8f208db42f7729b0ce2bd16c631c293e665c)
13fc4124cSDan Handley /*
2*11ad8f20SJeenu Viswambharan  * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
33fc4124cSDan Handley  *
482cb2c1aSdp-arm  * SPDX-License-Identifier: BSD-3-Clause
53fc4124cSDan Handley  */
63fc4124cSDan Handley 
73fc4124cSDan Handley #include <arch.h>
8*11ad8f20SJeenu Viswambharan #include <arm_config.h>
90108047aSSoby Mathew #include <cassert.h>
1038dce70fSSoby Mathew #include <plat_arm.h>
113fc4124cSDan Handley #include <platform_def.h>
123fc4124cSDan Handley #include "drivers/pwrc/fvp_pwrc.h"
133fc4124cSDan Handley 
140108047aSSoby Mathew /* The FVP power domain tree descriptor */
150108047aSSoby Mathew unsigned char fvp_power_domain_tree_desc[FVP_CLUSTER_COUNT + 1];
160108047aSSoby Mathew 
170108047aSSoby Mathew 
180108047aSSoby Mathew CASSERT(FVP_CLUSTER_COUNT && FVP_CLUSTER_COUNT <= 256, assert_invalid_fvp_cluster_count);
190108047aSSoby Mathew 
200108047aSSoby Mathew /*******************************************************************************
210108047aSSoby Mathew  * This function dynamically constructs the topology according to
220108047aSSoby Mathew  * FVP_CLUSTER_COUNT and returns it.
230108047aSSoby Mathew  ******************************************************************************/
240108047aSSoby Mathew const unsigned char *plat_get_power_domain_tree_desc(void)
250108047aSSoby Mathew {
260108047aSSoby Mathew 	int i;
270108047aSSoby Mathew 
2838dce70fSSoby Mathew 	/*
2938dce70fSSoby Mathew 	 * The FVP power domain tree does not have a single system level power domain
3038dce70fSSoby Mathew 	 * i.e. a single root node. The first entry in the power domain descriptor
3138dce70fSSoby Mathew 	 * specifies the number of power domains at the highest power level. For the FVP
320108047aSSoby Mathew 	 * this is the number of cluster power domains.
3338dce70fSSoby Mathew 	 */
340108047aSSoby Mathew 	fvp_power_domain_tree_desc[0] = FVP_CLUSTER_COUNT;
353fc4124cSDan Handley 
360108047aSSoby Mathew 	for (i = 0; i < FVP_CLUSTER_COUNT; i++)
370108047aSSoby Mathew 		fvp_power_domain_tree_desc[i + 1] = FVP_MAX_CPUS_PER_CLUSTER;
380108047aSSoby Mathew 
390108047aSSoby Mathew 	return fvp_power_domain_tree_desc;
400108047aSSoby Mathew }
410108047aSSoby Mathew 
420108047aSSoby Mathew /*******************************************************************************
430108047aSSoby Mathew  * This function returns the core count within the cluster corresponding to
440108047aSSoby Mathew  * `mpidr`.
450108047aSSoby Mathew  ******************************************************************************/
460108047aSSoby Mathew unsigned int plat_arm_get_cluster_core_count(u_register_t mpidr)
470108047aSSoby Mathew {
480108047aSSoby Mathew 	return FVP_MAX_CPUS_PER_CLUSTER;
490108047aSSoby Mathew }
503fc4124cSDan Handley 
513fc4124cSDan Handley /*******************************************************************************
523fc4124cSDan Handley  * This function implements a part of the critical interface between the psci
5338dce70fSSoby Mathew  * generic layer and the platform that allows the former to query the platform
5438dce70fSSoby Mathew  * to convert an MPIDR to a unique linear index. An error code (-1) is returned
5538dce70fSSoby Mathew  * in case the MPIDR is invalid.
563fc4124cSDan Handley  ******************************************************************************/
5738dce70fSSoby Mathew int plat_core_pos_by_mpidr(u_register_t mpidr)
583fc4124cSDan Handley {
5938dce70fSSoby Mathew 	if (fvp_pwrc_read_psysr(mpidr) == PSYSR_INVALID)
6038dce70fSSoby Mathew 		return -1;
613fc4124cSDan Handley 
62*11ad8f20SJeenu Viswambharan 	/*
63*11ad8f20SJeenu Viswambharan 	 * Core position calculation for FVP platform depends on the MT bit in
64*11ad8f20SJeenu Viswambharan 	 * MPIDR. This function cannot assume that the supplied MPIDR has the MT
65*11ad8f20SJeenu Viswambharan 	 * bit set even if the implementation has. For example, PSCI clients
66*11ad8f20SJeenu Viswambharan 	 * might supply MPIDR values without the MT bit set. Therefore, we
67*11ad8f20SJeenu Viswambharan 	 * inject the current PE's MT bit so as to get the calculation correct.
68*11ad8f20SJeenu Viswambharan 	 * This of course assumes that none or all CPUs on the platform has MT
69*11ad8f20SJeenu Viswambharan 	 * bit set.
70*11ad8f20SJeenu Viswambharan 	 */
71*11ad8f20SJeenu Viswambharan 	mpidr |= (read_mpidr_el1() & MPIDR_MT_MASK);
7238dce70fSSoby Mathew 	return plat_arm_calc_core_pos(mpidr);
733fc4124cSDan Handley }
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