13fc4124cSDan Handley /* 2*0108047aSSoby Mathew * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved. 33fc4124cSDan Handley * 43fc4124cSDan Handley * Redistribution and use in source and binary forms, with or without 53fc4124cSDan Handley * modification, are permitted provided that the following conditions are met: 63fc4124cSDan Handley * 73fc4124cSDan Handley * Redistributions of source code must retain the above copyright notice, this 83fc4124cSDan Handley * list of conditions and the following disclaimer. 93fc4124cSDan Handley * 103fc4124cSDan Handley * Redistributions in binary form must reproduce the above copyright notice, 113fc4124cSDan Handley * this list of conditions and the following disclaimer in the documentation 123fc4124cSDan Handley * and/or other materials provided with the distribution. 133fc4124cSDan Handley * 143fc4124cSDan Handley * Neither the name of ARM nor the names of its contributors may be used 153fc4124cSDan Handley * to endorse or promote products derived from this software without specific 163fc4124cSDan Handley * prior written permission. 173fc4124cSDan Handley * 183fc4124cSDan Handley * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 193fc4124cSDan Handley * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 203fc4124cSDan Handley * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 213fc4124cSDan Handley * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 223fc4124cSDan Handley * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 233fc4124cSDan Handley * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 243fc4124cSDan Handley * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 253fc4124cSDan Handley * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 263fc4124cSDan Handley * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 273fc4124cSDan Handley * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 283fc4124cSDan Handley * POSSIBILITY OF SUCH DAMAGE. 293fc4124cSDan Handley */ 303fc4124cSDan Handley 313fc4124cSDan Handley #include <arch.h> 32*0108047aSSoby Mathew #include <cassert.h> 3338dce70fSSoby Mathew #include <plat_arm.h> 343fc4124cSDan Handley #include <platform_def.h> 353fc4124cSDan Handley #include "drivers/pwrc/fvp_pwrc.h" 363fc4124cSDan Handley 37*0108047aSSoby Mathew /* The FVP power domain tree descriptor */ 38*0108047aSSoby Mathew unsigned char fvp_power_domain_tree_desc[FVP_CLUSTER_COUNT + 1]; 39*0108047aSSoby Mathew 40*0108047aSSoby Mathew 41*0108047aSSoby Mathew CASSERT(FVP_CLUSTER_COUNT && FVP_CLUSTER_COUNT <= 256, assert_invalid_fvp_cluster_count); 42*0108047aSSoby Mathew 43*0108047aSSoby Mathew /******************************************************************************* 44*0108047aSSoby Mathew * This function dynamically constructs the topology according to 45*0108047aSSoby Mathew * FVP_CLUSTER_COUNT and returns it. 46*0108047aSSoby Mathew ******************************************************************************/ 47*0108047aSSoby Mathew const unsigned char *plat_get_power_domain_tree_desc(void) 48*0108047aSSoby Mathew { 49*0108047aSSoby Mathew int i; 50*0108047aSSoby Mathew 5138dce70fSSoby Mathew /* 5238dce70fSSoby Mathew * The FVP power domain tree does not have a single system level power domain 5338dce70fSSoby Mathew * i.e. a single root node. The first entry in the power domain descriptor 5438dce70fSSoby Mathew * specifies the number of power domains at the highest power level. For the FVP 55*0108047aSSoby Mathew * this is the number of cluster power domains. 5638dce70fSSoby Mathew */ 57*0108047aSSoby Mathew fvp_power_domain_tree_desc[0] = FVP_CLUSTER_COUNT; 583fc4124cSDan Handley 59*0108047aSSoby Mathew for (i = 0; i < FVP_CLUSTER_COUNT; i++) 60*0108047aSSoby Mathew fvp_power_domain_tree_desc[i + 1] = FVP_MAX_CPUS_PER_CLUSTER; 61*0108047aSSoby Mathew 62*0108047aSSoby Mathew return fvp_power_domain_tree_desc; 63*0108047aSSoby Mathew } 64*0108047aSSoby Mathew 65*0108047aSSoby Mathew /******************************************************************************* 66*0108047aSSoby Mathew * This function returns the core count within the cluster corresponding to 67*0108047aSSoby Mathew * `mpidr`. 68*0108047aSSoby Mathew ******************************************************************************/ 69*0108047aSSoby Mathew unsigned int plat_arm_get_cluster_core_count(u_register_t mpidr) 70*0108047aSSoby Mathew { 71*0108047aSSoby Mathew return FVP_MAX_CPUS_PER_CLUSTER; 72*0108047aSSoby Mathew } 733fc4124cSDan Handley 743fc4124cSDan Handley /******************************************************************************* 753fc4124cSDan Handley * This function implements a part of the critical interface between the psci 7638dce70fSSoby Mathew * generic layer and the platform that allows the former to query the platform 7738dce70fSSoby Mathew * to convert an MPIDR to a unique linear index. An error code (-1) is returned 7838dce70fSSoby Mathew * in case the MPIDR is invalid. 793fc4124cSDan Handley ******************************************************************************/ 8038dce70fSSoby Mathew int plat_core_pos_by_mpidr(u_register_t mpidr) 813fc4124cSDan Handley { 8238dce70fSSoby Mathew if (arm_check_mpidr(mpidr) == -1) 8338dce70fSSoby Mathew return -1; 843fc4124cSDan Handley 8538dce70fSSoby Mathew if (fvp_pwrc_read_psysr(mpidr) == PSYSR_INVALID) 8638dce70fSSoby Mathew return -1; 873fc4124cSDan Handley 8838dce70fSSoby Mathew return plat_arm_calc_core_pos(mpidr); 893fc4124cSDan Handley } 90