1# 2# Copyright (c) 2023, Arm Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7 8#/* 9# * TODO: below lines of code to be removed 10# * after abi and framework are synchronized 11# */ 12 13ifeq (${ERRATA_ABI_SUPPORT}, 1) 14# enable the cpu macros for errata abi interface 15ifeq (${ARCH}, aarch64) 16ifeq (${HW_ASSISTED_COHERENCY}, 0) 17CORTEX_A35_H_INC := 1 18CORTEX_A53_H_INC := 1 19CORTEX_A57_H_INC := 1 20CORTEX_A72_H_INC := 1 21CORTEX_A73_H_INC := 1 22$(eval $(call add_define, CORTEX_A35_H_INC)) 23$(eval $(call add_define, CORTEX_A53_H_INC)) 24$(eval $(call add_define, CORTEX_A57_H_INC)) 25$(eval $(call add_define, CORTEX_A72_H_INC)) 26$(eval $(call add_define, CORTEX_A73_H_INC)) 27else 28ifeq (${CTX_INCLUDE_AARCH32_REGS}, 0) 29CORTEX_A76_H_INC := 1 30CORTEX_A77_H_INC := 1 31CORTEX_A78_H_INC := 1 32NEOVERSE_N1_H_INC := 1 33NEOVERSE_N2_H_INC := 1 34NEOVERSE_V1_H_INC := 1 35CORTEX_A78_AE_H_INC := 1 36CORTEX_A510_H_INC := 1 37CORTEX_A710_H_INC := 1 38CORTEX_A715_H_INC := 1 39CORTEX_A78C_H_INC := 1 40CORTEX_X2_H_INC := 1 41$(eval $(call add_define, CORTEX_A76_H_INC)) 42$(eval $(call add_define, CORTEX_A77_H_INC)) 43$(eval $(call add_define, CORTEX_A78_H_INC)) 44$(eval $(call add_define, NEOVERSE_N1_H_INC)) 45$(eval $(call add_define, NEOVERSE_N2_H_INC)) 46$(eval $(call add_define, NEOVERSE_V1_H_INC)) 47$(eval $(call add_define, CORTEX_A78_AE_H_INC)) 48$(eval $(call add_define, CORTEX_A510_H_INC)) 49$(eval $(call add_define, CORTEX_A710_H_INC)) 50$(eval $(call add_define, CORTEX_A715_H_INC)) 51$(eval $(call add_define, CORTEX_A78C_H_INC)) 52$(eval $(call add_define, CORTEX_X2_H_INC)) 53endif 54CORTEX_A55_H_INC := 1 55CORTEX_A75_H_INC := 1 56$(eval $(call add_define, CORTEX_A55_H_INC)) 57$(eval $(call add_define, CORTEX_A75_H_INC)) 58endif 59else 60CORTEX_A32_H_INC := 1 61$(eval $(call add_define, CORTEX_A32_H_INC)) 62endif 63endif 64