1 /* 2 * Copyright (c) 2013-2024, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 #include <common/debug.h> 9 #include <drivers/arm/smmu_v3.h> 10 #include <fconf_hw_config_getter.h> 11 #include <lib/fconf/fconf.h> 12 #include <lib/fconf/fconf_dyn_cfg_getter.h> 13 #include <lib/mmio.h> 14 #include <plat/arm/common/arm_config.h> 15 #include <plat/arm/common/plat_arm.h> 16 #include <plat/common/platform.h> 17 18 #include "fvp_private.h" 19 20 static const struct dyn_cfg_dtb_info_t *hw_config_info __unused; 21 22 void __init bl31_early_platform_setup2(u_register_t arg0, 23 u_register_t arg1, u_register_t arg2, u_register_t arg3) 24 { 25 /* Initialize the console to provide early debug support */ 26 arm_console_boot_init(); 27 28 #if !RESET_TO_BL31 && !RESET_TO_BL2 29 const struct dyn_cfg_dtb_info_t *soc_fw_config_info; 30 31 INFO("BL31 FCONF: FW_CONFIG address = %lx\n", (uintptr_t)arg1); 32 /* Fill the properties struct with the info from the config dtb */ 33 fconf_populate("FW_CONFIG", arg1); 34 35 soc_fw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, SOC_FW_CONFIG_ID); 36 if (soc_fw_config_info != NULL) { 37 arg1 = soc_fw_config_info->config_addr; 38 } 39 40 /* 41 * arg2 is currently holding the 'secure' address of HW_CONFIG. 42 * But arm_bl31_early_platform_setup() below expects the 'non-secure' 43 * address of HW_CONFIG (which it will pass to BL33). 44 * This why we need to override arg2 here. 45 */ 46 hw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, HW_CONFIG_ID); 47 assert(hw_config_info != NULL); 48 assert(hw_config_info->secondary_config_addr != 0UL); 49 arg2 = hw_config_info->secondary_config_addr; 50 #endif /* !RESET_TO_BL31 && !RESET_TO_BL2 */ 51 52 arm_bl31_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3); 53 54 /* Initialize the platform config for future decision making */ 55 fvp_config_setup(); 56 57 /* 58 * Initialize the correct interconnect for this cluster during cold 59 * boot. No need for locks as no other CPU is active. 60 */ 61 fvp_interconnect_init(); 62 63 /* 64 * Enable coherency in interconnect for the primary CPU's cluster. 65 * Earlier bootloader stages might already do this (e.g. Trusted 66 * Firmware's BL1 does it) but we can't assume so. There is no harm in 67 * executing this code twice anyway. 68 * FVP PSCI code will enable coherency for other clusters. 69 */ 70 fvp_interconnect_enable(); 71 72 /* Initialize System level generic or SP804 timer */ 73 fvp_timer_init(); 74 75 /* On FVP RevC, initialize SMMUv3 */ 76 if ((arm_config.flags & ARM_CONFIG_FVP_HAS_SMMUV3) != 0U) { 77 if (smmuv3_security_init(PLAT_FVP_SMMUV3_BASE) != 0) { 78 /* 79 * Don't proceed for smmuv3 initialization if the 80 * security init failed. 81 */ 82 return; 83 } 84 /* SMMUv3 initialization failure is not fatal */ 85 if (smmuv3_init(PLAT_FVP_SMMUV3_BASE) != 0) { 86 WARN("Failed initializing SMMU.\n"); 87 } 88 } 89 } 90 91 void __init bl31_plat_arch_setup(void) 92 { 93 int rc __unused; 94 uintptr_t hw_config_base_align __unused; 95 size_t mapped_size_align __unused; 96 97 arm_bl31_plat_arch_setup(); 98 99 /* 100 * For RESET_TO_BL31 systems, BL31 is the first bootloader to run. 101 * So there is no BL2 to load the HW_CONFIG dtb into memory before 102 * control is passed to BL31. The code below relies on dynamic mapping 103 * capability, which is not supported by xlat tables lib V1. 104 * TODO: remove the ARM_XLAT_TABLES_LIB_V1 check when its support 105 * gets deprecated. 106 */ 107 #if !RESET_TO_BL31 && !RESET_TO_BL2 && !ARM_XLAT_TABLES_LIB_V1 108 assert(hw_config_info != NULL); 109 assert(hw_config_info->config_addr != 0UL); 110 111 /* Page aligned address and size if necessary */ 112 hw_config_base_align = page_align(hw_config_info->config_addr, DOWN); 113 mapped_size_align = page_align(hw_config_info->config_max_size, UP); 114 115 if ((hw_config_info->config_addr != hw_config_base_align) && 116 (hw_config_info->config_max_size == mapped_size_align)) { 117 mapped_size_align += PAGE_SIZE; 118 } 119 120 /* 121 * map dynamically HW config region with its aligned base address and 122 * size 123 */ 124 rc = mmap_add_dynamic_region((unsigned long long)hw_config_base_align, 125 hw_config_base_align, 126 mapped_size_align, 127 MT_RO_DATA); 128 if (rc != 0) { 129 ERROR("Error while mapping HW_CONFIG device tree (%d).\n", rc); 130 panic(); 131 } 132 133 /* Populate HW_CONFIG device tree with the mapped address */ 134 fconf_populate("HW_CONFIG", hw_config_info->config_addr); 135 136 /* unmap the HW_CONFIG memory region */ 137 rc = mmap_remove_dynamic_region(hw_config_base_align, mapped_size_align); 138 if (rc != 0) { 139 ERROR("Error while unmapping HW_CONFIG device tree (%d).\n", 140 rc); 141 panic(); 142 } 143 #endif /* !RESET_TO_BL31 && !RESET_TO_BL2 && !ARM_XLAT_TABLES_LIB_V1 */ 144 } 145 146 unsigned int plat_get_syscnt_freq2(void) 147 { 148 unsigned int counter_base_frequency; 149 150 #if !RESET_TO_BL31 && !RESET_TO_BL2 151 /* Get the frequency through FCONF API for HW_CONFIG */ 152 counter_base_frequency = FCONF_GET_PROPERTY(hw_config, cpu_timer, clock_freq); 153 if (counter_base_frequency > 0U) { 154 return counter_base_frequency; 155 } 156 #endif 157 158 /* Read the frequency from Frequency modes table */ 159 counter_base_frequency = mmio_read_32(ARM_SYS_CNTCTL_BASE + CNTFID_OFF); 160 161 /* The first entry of the frequency modes table must not be 0 */ 162 if (counter_base_frequency == 0U) { 163 panic(); 164 } 165 166 return counter_base_frequency; 167 } 168