1 /* 2 * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <drivers/arm/smmu_v3.h> 8 #include <plat/common/platform.h> 9 10 #include <arm_config.h> 11 #include <plat_arm.h> 12 #include "fvp_private.h" 13 14 void __init bl31_early_platform_setup2(u_register_t arg0, 15 u_register_t arg1, u_register_t arg2, u_register_t arg3) 16 { 17 arm_bl31_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3); 18 19 /* Initialize the platform config for future decision making */ 20 fvp_config_setup(); 21 22 /* 23 * Initialize the correct interconnect for this cluster during cold 24 * boot. No need for locks as no other CPU is active. 25 */ 26 fvp_interconnect_init(); 27 28 /* 29 * Enable coherency in interconnect for the primary CPU's cluster. 30 * Earlier bootloader stages might already do this (e.g. Trusted 31 * Firmware's BL1 does it) but we can't assume so. There is no harm in 32 * executing this code twice anyway. 33 * FVP PSCI code will enable coherency for other clusters. 34 */ 35 fvp_interconnect_enable(); 36 37 /* On FVP RevC, intialize SMMUv3 */ 38 if ((arm_config.flags & ARM_CONFIG_FVP_HAS_SMMUV3) != 0U) 39 smmuv3_init(PLAT_FVP_SMMUV3_BASE); 40 } 41