13fc4124cSDan Handley /* 2*f348aec1SManish V Badarkhe * Copyright (c) 2013-2023, Arm Limited and Contributors. All rights reserved. 33fc4124cSDan Handley * 482cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 53fc4124cSDan Handley */ 63fc4124cSDan Handley 77fb9bcd8SManish V Badarkhe #include <assert.h> 87fb9bcd8SManish V Badarkhe 94a135bc3SAlexei Fedorov #include <common/debug.h> 107fb9bcd8SManish V Badarkhe #include <common/desc_image_load.h> 1109d40e0eSAntonio Nino Diaz #include <drivers/arm/sp804_delay_timer.h> 127fb9bcd8SManish V Badarkhe #include <lib/fconf/fconf.h> 137fb9bcd8SManish V Badarkhe #include <lib/fconf/fconf_dyn_cfg_getter.h> 147fb9bcd8SManish V Badarkhe 15bd9344f6SAntonio Nino Diaz #include <plat/arm/common/plat_arm.h> 1609d40e0eSAntonio Nino Diaz #include <plat/common/platform.h> 17234bc7f8SAntonio Nino Diaz #include <platform_def.h> 1809d40e0eSAntonio Nino Diaz 193fc4124cSDan Handley #include "fvp_private.h" 203fc4124cSDan Handley 210c306cc0SSoby Mathew void bl2_early_platform_setup2(u_register_t arg0, u_register_t arg1, u_register_t arg2, u_register_t arg3) 223fc4124cSDan Handley { 23cab0b5b0SSoby Mathew arm_bl2_early_platform_setup((uintptr_t)arg0, (meminfo_t *)arg1); 243fc4124cSDan Handley 253fc4124cSDan Handley /* Initialize the platform config for future decision making */ 263fc4124cSDan Handley fvp_config_setup(); 273fc4124cSDan Handley } 28b49b3221SRyan Harkin 29b49b3221SRyan Harkin void bl2_platform_setup(void) 30b49b3221SRyan Harkin { 31b49b3221SRyan Harkin arm_bl2_platform_setup(); 32b49b3221SRyan Harkin 331b597c22SAlexei Fedorov /* Initialize System level generic or SP804 timer */ 341b597c22SAlexei Fedorov fvp_timer_init(); 35b49b3221SRyan Harkin } 367fb9bcd8SManish V Badarkhe 377fb9bcd8SManish V Badarkhe /******************************************************************************* 387fb9bcd8SManish V Badarkhe * This function returns the list of executable images 397fb9bcd8SManish V Badarkhe ******************************************************************************/ 407fb9bcd8SManish V Badarkhe struct bl_params *plat_get_next_bl_params(void) 417fb9bcd8SManish V Badarkhe { 427fb9bcd8SManish V Badarkhe struct bl_params *arm_bl_params; 4339f0b86aSManish V Badarkhe const struct dyn_cfg_dtb_info_t *hw_config_info __unused; 4439f0b86aSManish V Badarkhe bl_mem_params_node_t *param_node __unused; 457fb9bcd8SManish V Badarkhe 467fb9bcd8SManish V Badarkhe arm_bl_params = arm_get_next_bl_params(); 477fb9bcd8SManish V Badarkhe 4839f0b86aSManish V Badarkhe #if !BL2_AT_EL3 && !EL3_PAYLOAD_BASE 497fb9bcd8SManish V Badarkhe const struct dyn_cfg_dtb_info_t *fw_config_info; 5039f0b86aSManish V Badarkhe uintptr_t fw_config_base = 0UL; 517fb9bcd8SManish V Badarkhe entry_point_info_t *ep_info; 527fb9bcd8SManish V Badarkhe 5339f0b86aSManish V Badarkhe #if __aarch64__ 547fb9bcd8SManish V Badarkhe /* Get BL31 image node */ 557fb9bcd8SManish V Badarkhe param_node = get_bl_mem_params_node(BL31_IMAGE_ID); 5639f0b86aSManish V Badarkhe #else /* aarch32 */ 5739f0b86aSManish V Badarkhe /* Get SP_MIN image node */ 5839f0b86aSManish V Badarkhe param_node = get_bl_mem_params_node(BL32_IMAGE_ID); 5939f0b86aSManish V Badarkhe #endif /* __aarch64__ */ 607fb9bcd8SManish V Badarkhe assert(param_node != NULL); 617fb9bcd8SManish V Badarkhe 627fb9bcd8SManish V Badarkhe /* get fw_config load address */ 637fb9bcd8SManish V Badarkhe fw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, FW_CONFIG_ID); 647fb9bcd8SManish V Badarkhe assert(fw_config_info != NULL); 657fb9bcd8SManish V Badarkhe 667fb9bcd8SManish V Badarkhe fw_config_base = fw_config_info->config_addr; 6739f0b86aSManish V Badarkhe assert(fw_config_base != 0UL); 687fb9bcd8SManish V Badarkhe 697fb9bcd8SManish V Badarkhe /* 7039f0b86aSManish V Badarkhe * Get the entry point info of next executable image and override 717fb9bcd8SManish V Badarkhe * arg1 of entry point info with fw_config base address 727fb9bcd8SManish V Badarkhe */ 737fb9bcd8SManish V Badarkhe ep_info = ¶m_node->ep_info; 747fb9bcd8SManish V Badarkhe ep_info->args.arg1 = (uint32_t)fw_config_base; 7539f0b86aSManish V Badarkhe 7639f0b86aSManish V Badarkhe /* grab NS HW config address */ 7739f0b86aSManish V Badarkhe hw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, HW_CONFIG_ID); 78a42b426bSManish V Badarkhe assert(hw_config_info != NULL); 7939f0b86aSManish V Badarkhe 8039f0b86aSManish V Badarkhe /* To retrieve actual size of the HW_CONFIG */ 8139f0b86aSManish V Badarkhe param_node = get_bl_mem_params_node(HW_CONFIG_ID); 8239f0b86aSManish V Badarkhe assert(param_node != NULL); 8339f0b86aSManish V Badarkhe 8439f0b86aSManish V Badarkhe /* Copy HW config from Secure address to NS address */ 85*f348aec1SManish V Badarkhe memcpy((void *)hw_config_info->secondary_config_addr, 8639f0b86aSManish V Badarkhe (void *)hw_config_info->config_addr, 8739f0b86aSManish V Badarkhe (size_t)param_node->image_info.image_size); 8839f0b86aSManish V Badarkhe 8939f0b86aSManish V Badarkhe /* 9039f0b86aSManish V Badarkhe * Ensure HW-config device tree committed to memory, as there is 9139f0b86aSManish V Badarkhe * a possibility to use HW-config without cache and MMU enabled 9239f0b86aSManish V Badarkhe * at BL33 9339f0b86aSManish V Badarkhe */ 94*f348aec1SManish V Badarkhe flush_dcache_range(hw_config_info->secondary_config_addr, 9539f0b86aSManish V Badarkhe param_node->image_info.image_size); 9639f0b86aSManish V Badarkhe 9739f0b86aSManish V Badarkhe param_node = get_bl_mem_params_node(BL33_IMAGE_ID); 9839f0b86aSManish V Badarkhe assert(param_node != NULL); 9939f0b86aSManish V Badarkhe 10039f0b86aSManish V Badarkhe /* Update BL33's ep info with NS HW config address */ 101*f348aec1SManish V Badarkhe param_node->ep_info.args.arg1 = hw_config_info->secondary_config_addr; 10239f0b86aSManish V Badarkhe #endif /* !BL2_AT_EL3 && !EL3_PAYLOAD_BASE */ 1037fb9bcd8SManish V Badarkhe 1047fb9bcd8SManish V Badarkhe return arm_bl_params; 1057fb9bcd8SManish V Badarkhe } 106