13fc4124cSDan Handley /* 2f348aec1SManish V Badarkhe * Copyright (c) 2013-2023, Arm Limited and Contributors. All rights reserved. 33fc4124cSDan Handley * 482cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 53fc4124cSDan Handley */ 63fc4124cSDan Handley 77fb9bcd8SManish V Badarkhe #include <assert.h> 87fb9bcd8SManish V Badarkhe 94a135bc3SAlexei Fedorov #include <common/debug.h> 107fb9bcd8SManish V Badarkhe #include <common/desc_image_load.h> 1109d40e0eSAntonio Nino Diaz #include <drivers/arm/sp804_delay_timer.h> 127fb9bcd8SManish V Badarkhe #include <lib/fconf/fconf.h> 137fb9bcd8SManish V Badarkhe #include <lib/fconf/fconf_dyn_cfg_getter.h> 14*94c90ac8SHarrison Mutai #include <lib/transfer_list.h> 157fb9bcd8SManish V Badarkhe 16bd9344f6SAntonio Nino Diaz #include <plat/arm/common/plat_arm.h> 1709d40e0eSAntonio Nino Diaz #include <plat/common/platform.h> 18234bc7f8SAntonio Nino Diaz #include <platform_def.h> 1909d40e0eSAntonio Nino Diaz 203fc4124cSDan Handley #include "fvp_private.h" 213fc4124cSDan Handley 220c306cc0SSoby Mathew void bl2_early_platform_setup2(u_register_t arg0, u_register_t arg1, u_register_t arg2, u_register_t arg3) 233fc4124cSDan Handley { 24cab0b5b0SSoby Mathew arm_bl2_early_platform_setup((uintptr_t)arg0, (meminfo_t *)arg1); 253fc4124cSDan Handley 263fc4124cSDan Handley /* Initialize the platform config for future decision making */ 273fc4124cSDan Handley fvp_config_setup(); 283fc4124cSDan Handley } 29b49b3221SRyan Harkin 30b49b3221SRyan Harkin void bl2_platform_setup(void) 31b49b3221SRyan Harkin { 32b49b3221SRyan Harkin arm_bl2_platform_setup(); 33b49b3221SRyan Harkin 341b597c22SAlexei Fedorov /* Initialize System level generic or SP804 timer */ 351b597c22SAlexei Fedorov fvp_timer_init(); 36b49b3221SRyan Harkin } 377fb9bcd8SManish V Badarkhe 387fb9bcd8SManish V Badarkhe /******************************************************************************* 397fb9bcd8SManish V Badarkhe * This function returns the list of executable images 407fb9bcd8SManish V Badarkhe ******************************************************************************/ 417fb9bcd8SManish V Badarkhe struct bl_params *plat_get_next_bl_params(void) 427fb9bcd8SManish V Badarkhe { 437fb9bcd8SManish V Badarkhe struct bl_params *arm_bl_params; 4439f0b86aSManish V Badarkhe const struct dyn_cfg_dtb_info_t *hw_config_info __unused; 4539f0b86aSManish V Badarkhe bl_mem_params_node_t *param_node __unused; 46*94c90ac8SHarrison Mutai static struct transfer_list_header *ns_tl __unused; 47*94c90ac8SHarrison Mutai struct transfer_list_entry *te __unused; 487fb9bcd8SManish V Badarkhe 497fb9bcd8SManish V Badarkhe arm_bl_params = arm_get_next_bl_params(); 507fb9bcd8SManish V Badarkhe 5142d4d3baSArvind Ram Prakash #if !RESET_TO_BL2 && !EL3_PAYLOAD_BASE 527fb9bcd8SManish V Badarkhe const struct dyn_cfg_dtb_info_t *fw_config_info; 5339f0b86aSManish V Badarkhe uintptr_t fw_config_base = 0UL; 547fb9bcd8SManish V Badarkhe entry_point_info_t *ep_info; 557fb9bcd8SManish V Badarkhe 5639f0b86aSManish V Badarkhe #if __aarch64__ 577fb9bcd8SManish V Badarkhe /* Get BL31 image node */ 587fb9bcd8SManish V Badarkhe param_node = get_bl_mem_params_node(BL31_IMAGE_ID); 5939f0b86aSManish V Badarkhe #else /* aarch32 */ 6039f0b86aSManish V Badarkhe /* Get SP_MIN image node */ 6139f0b86aSManish V Badarkhe param_node = get_bl_mem_params_node(BL32_IMAGE_ID); 6239f0b86aSManish V Badarkhe #endif /* __aarch64__ */ 637fb9bcd8SManish V Badarkhe assert(param_node != NULL); 647fb9bcd8SManish V Badarkhe 657fb9bcd8SManish V Badarkhe /* get fw_config load address */ 667fb9bcd8SManish V Badarkhe fw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, FW_CONFIG_ID); 677fb9bcd8SManish V Badarkhe assert(fw_config_info != NULL); 687fb9bcd8SManish V Badarkhe 697fb9bcd8SManish V Badarkhe fw_config_base = fw_config_info->config_addr; 7039f0b86aSManish V Badarkhe assert(fw_config_base != 0UL); 717fb9bcd8SManish V Badarkhe 727fb9bcd8SManish V Badarkhe /* 7339f0b86aSManish V Badarkhe * Get the entry point info of next executable image and override 747fb9bcd8SManish V Badarkhe * arg1 of entry point info with fw_config base address 757fb9bcd8SManish V Badarkhe */ 767fb9bcd8SManish V Badarkhe ep_info = ¶m_node->ep_info; 777fb9bcd8SManish V Badarkhe ep_info->args.arg1 = (uint32_t)fw_config_base; 7839f0b86aSManish V Badarkhe 7939f0b86aSManish V Badarkhe /* grab NS HW config address */ 8039f0b86aSManish V Badarkhe hw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, HW_CONFIG_ID); 81a42b426bSManish V Badarkhe assert(hw_config_info != NULL); 8239f0b86aSManish V Badarkhe 8339f0b86aSManish V Badarkhe /* To retrieve actual size of the HW_CONFIG */ 8439f0b86aSManish V Badarkhe param_node = get_bl_mem_params_node(HW_CONFIG_ID); 8539f0b86aSManish V Badarkhe assert(param_node != NULL); 8639f0b86aSManish V Badarkhe 87*94c90ac8SHarrison Mutai bl_mem_params_node_t *bl33_param_node = get_bl_mem_params_node(BL33_IMAGE_ID); 88*94c90ac8SHarrison Mutai assert(bl33_param_node != NULL); 89*94c90ac8SHarrison Mutai 90*94c90ac8SHarrison Mutai #if TRANSFER_LIST 91*94c90ac8SHarrison Mutai ns_tl = transfer_list_init((void *)FW_NS_HANDOFF_BASE, FW_HANDOFF_SIZE); 92*94c90ac8SHarrison Mutai assert(ns_tl != NULL); 93*94c90ac8SHarrison Mutai 94*94c90ac8SHarrison Mutai /* Update BL33's ep info with NS HW config address */ 95*94c90ac8SHarrison Mutai te = transfer_list_add(ns_tl, TL_TAG_FDT, param_node->image_info.image_size, 96*94c90ac8SHarrison Mutai (void *)hw_config_info->config_addr); 97*94c90ac8SHarrison Mutai assert(te != NULL); 98*94c90ac8SHarrison Mutai 99*94c90ac8SHarrison Mutai bl33_param_node->ep_info.args.arg1 = TRANSFER_LIST_SIGNATURE | REGISTER_CONVENTION_VERSION_MASK; 100*94c90ac8SHarrison Mutai bl33_param_node->ep_info.args.arg2 = 0; 101*94c90ac8SHarrison Mutai bl33_param_node->ep_info.args.arg3 = (uintptr_t)ns_tl; 102*94c90ac8SHarrison Mutai bl33_param_node->ep_info.args.arg0 = te ? (uintptr_t)transfer_list_entry_data(te) : 0; 103*94c90ac8SHarrison Mutai #else 10439f0b86aSManish V Badarkhe /* Copy HW config from Secure address to NS address */ 105f348aec1SManish V Badarkhe memcpy((void *)hw_config_info->secondary_config_addr, 10639f0b86aSManish V Badarkhe (void *)hw_config_info->config_addr, 10739f0b86aSManish V Badarkhe (size_t)param_node->image_info.image_size); 10839f0b86aSManish V Badarkhe 10939f0b86aSManish V Badarkhe /* 11039f0b86aSManish V Badarkhe * Ensure HW-config device tree committed to memory, as there is 11139f0b86aSManish V Badarkhe * a possibility to use HW-config without cache and MMU enabled 11239f0b86aSManish V Badarkhe * at BL33 11339f0b86aSManish V Badarkhe */ 114f348aec1SManish V Badarkhe flush_dcache_range(hw_config_info->secondary_config_addr, 11539f0b86aSManish V Badarkhe param_node->image_info.image_size); 11639f0b86aSManish V Badarkhe 117*94c90ac8SHarrison Mutai bl33_param_node->ep_info.args.arg1 = hw_config_info->secondary_config_addr; 118*94c90ac8SHarrison Mutai #endif /* TRANSFER_LIST */ 11942d4d3baSArvind Ram Prakash #endif /* !RESET_TO_BL2 && !EL3_PAYLOAD_BASE */ 1207fb9bcd8SManish V Badarkhe 1217fb9bcd8SManish V Badarkhe return arm_bl_params; 1227fb9bcd8SManish V Badarkhe } 123