xref: /rk3399_ARM-atf/plat/arm/board/fvp/fvp_bl2_setup.c (revision 39f0b86a76534d0b7c71dd0c8b34f1a74480386b)
13fc4124cSDan Handley /*
2*39f0b86aSManish V Badarkhe  * Copyright (c) 2013-2022, Arm Limited and Contributors. All rights reserved.
33fc4124cSDan Handley  *
482cb2c1aSdp-arm  * SPDX-License-Identifier: BSD-3-Clause
53fc4124cSDan Handley  */
63fc4124cSDan Handley 
77fb9bcd8SManish V Badarkhe #include <assert.h>
87fb9bcd8SManish V Badarkhe 
94a135bc3SAlexei Fedorov #include <common/debug.h>
107fb9bcd8SManish V Badarkhe #include <common/desc_image_load.h>
1109d40e0eSAntonio Nino Diaz #include <drivers/arm/sp804_delay_timer.h>
127fb9bcd8SManish V Badarkhe #include <lib/fconf/fconf.h>
137fb9bcd8SManish V Badarkhe #include <lib/fconf/fconf_dyn_cfg_getter.h>
147fb9bcd8SManish V Badarkhe 
15bd9344f6SAntonio Nino Diaz #include <plat/arm/common/plat_arm.h>
1609d40e0eSAntonio Nino Diaz #include <plat/common/platform.h>
17234bc7f8SAntonio Nino Diaz #include <platform_def.h>
1809d40e0eSAntonio Nino Diaz 
193fc4124cSDan Handley #include "fvp_private.h"
203fc4124cSDan Handley 
210c306cc0SSoby Mathew void bl2_early_platform_setup2(u_register_t arg0, u_register_t arg1, u_register_t arg2, u_register_t arg3)
223fc4124cSDan Handley {
23cab0b5b0SSoby Mathew 	arm_bl2_early_platform_setup((uintptr_t)arg0, (meminfo_t *)arg1);
243fc4124cSDan Handley 
253fc4124cSDan Handley 	/* Initialize the platform config for future decision making */
263fc4124cSDan Handley 	fvp_config_setup();
273fc4124cSDan Handley }
28b49b3221SRyan Harkin 
29b49b3221SRyan Harkin void bl2_platform_setup(void)
30b49b3221SRyan Harkin {
31b49b3221SRyan Harkin 	arm_bl2_platform_setup();
32b49b3221SRyan Harkin 
331b597c22SAlexei Fedorov 	/* Initialize System level generic or SP804 timer */
341b597c22SAlexei Fedorov 	fvp_timer_init();
35b49b3221SRyan Harkin }
367fb9bcd8SManish V Badarkhe 
377fb9bcd8SManish V Badarkhe /*******************************************************************************
387fb9bcd8SManish V Badarkhe  * This function returns the list of executable images
397fb9bcd8SManish V Badarkhe  ******************************************************************************/
407fb9bcd8SManish V Badarkhe struct bl_params *plat_get_next_bl_params(void)
417fb9bcd8SManish V Badarkhe {
427fb9bcd8SManish V Badarkhe 	struct bl_params *arm_bl_params;
43*39f0b86aSManish V Badarkhe 	const struct dyn_cfg_dtb_info_t *hw_config_info __unused;
44*39f0b86aSManish V Badarkhe 	bl_mem_params_node_t *param_node __unused;
457fb9bcd8SManish V Badarkhe 
467fb9bcd8SManish V Badarkhe 	arm_bl_params = arm_get_next_bl_params();
477fb9bcd8SManish V Badarkhe 
48*39f0b86aSManish V Badarkhe #if !BL2_AT_EL3 && !EL3_PAYLOAD_BASE
497fb9bcd8SManish V Badarkhe 	const struct dyn_cfg_dtb_info_t *fw_config_info;
50*39f0b86aSManish V Badarkhe 	uintptr_t fw_config_base = 0UL;
517fb9bcd8SManish V Badarkhe 	entry_point_info_t *ep_info;
527fb9bcd8SManish V Badarkhe 
53*39f0b86aSManish V Badarkhe #if __aarch64__
547fb9bcd8SManish V Badarkhe 	/* Get BL31 image node */
557fb9bcd8SManish V Badarkhe 	param_node = get_bl_mem_params_node(BL31_IMAGE_ID);
56*39f0b86aSManish V Badarkhe #else /* aarch32 */
57*39f0b86aSManish V Badarkhe 	/* Get SP_MIN image node */
58*39f0b86aSManish V Badarkhe 	param_node = get_bl_mem_params_node(BL32_IMAGE_ID);
59*39f0b86aSManish V Badarkhe #endif /* __aarch64__ */
607fb9bcd8SManish V Badarkhe 	assert(param_node != NULL);
617fb9bcd8SManish V Badarkhe 
627fb9bcd8SManish V Badarkhe 	/* get fw_config load address */
637fb9bcd8SManish V Badarkhe 	fw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, FW_CONFIG_ID);
647fb9bcd8SManish V Badarkhe 	assert(fw_config_info != NULL);
657fb9bcd8SManish V Badarkhe 
667fb9bcd8SManish V Badarkhe 	fw_config_base = fw_config_info->config_addr;
67*39f0b86aSManish V Badarkhe 	assert(fw_config_base != 0UL);
687fb9bcd8SManish V Badarkhe 
697fb9bcd8SManish V Badarkhe 	/*
70*39f0b86aSManish V Badarkhe 	 * Get the entry point info of next executable image and override
717fb9bcd8SManish V Badarkhe 	 * arg1 of entry point info with fw_config base address
727fb9bcd8SManish V Badarkhe 	 */
737fb9bcd8SManish V Badarkhe 	ep_info = &param_node->ep_info;
747fb9bcd8SManish V Badarkhe 	ep_info->args.arg1 = (uint32_t)fw_config_base;
75*39f0b86aSManish V Badarkhe 
76*39f0b86aSManish V Badarkhe 	/* grab NS HW config address */
77*39f0b86aSManish V Badarkhe 	hw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, HW_CONFIG_ID);
78*39f0b86aSManish V Badarkhe 
79*39f0b86aSManish V Badarkhe 	/* To retrieve actual size of the HW_CONFIG */
80*39f0b86aSManish V Badarkhe 	param_node = get_bl_mem_params_node(HW_CONFIG_ID);
81*39f0b86aSManish V Badarkhe 	assert(param_node != NULL);
82*39f0b86aSManish V Badarkhe 
83*39f0b86aSManish V Badarkhe 	/* Copy HW config from Secure address to NS address */
84*39f0b86aSManish V Badarkhe 	memcpy((void *)hw_config_info->ns_config_addr,
85*39f0b86aSManish V Badarkhe 	       (void *)hw_config_info->config_addr,
86*39f0b86aSManish V Badarkhe 	       (size_t)param_node->image_info.image_size);
87*39f0b86aSManish V Badarkhe 
88*39f0b86aSManish V Badarkhe 	/*
89*39f0b86aSManish V Badarkhe 	 * Ensure HW-config device tree committed to memory, as there is
90*39f0b86aSManish V Badarkhe 	 * a possibility to use HW-config without cache and MMU enabled
91*39f0b86aSManish V Badarkhe 	 * at BL33
92*39f0b86aSManish V Badarkhe 	 */
93*39f0b86aSManish V Badarkhe 	flush_dcache_range(hw_config_info->ns_config_addr,
94*39f0b86aSManish V Badarkhe 			   param_node->image_info.image_size);
95*39f0b86aSManish V Badarkhe 
96*39f0b86aSManish V Badarkhe 	param_node = get_bl_mem_params_node(BL33_IMAGE_ID);
97*39f0b86aSManish V Badarkhe 	assert(param_node != NULL);
98*39f0b86aSManish V Badarkhe 
99*39f0b86aSManish V Badarkhe 	/* Update BL33's ep info with NS HW config address  */
100*39f0b86aSManish V Badarkhe 	param_node->ep_info.args.arg1 = hw_config_info->ns_config_addr;
101*39f0b86aSManish V Badarkhe #endif /* !BL2_AT_EL3 && !EL3_PAYLOAD_BASE */
1027fb9bcd8SManish V Badarkhe 
1037fb9bcd8SManish V Badarkhe 	return arm_bl_params;
1047fb9bcd8SManish V Badarkhe }
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