13fc4124cSDan Handley /* 20c306cc0SSoby Mathew * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. 33fc4124cSDan Handley * 482cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 53fc4124cSDan Handley */ 63fc4124cSDan Handley 709d40e0eSAntonio Nino Diaz #include <drivers/arm/sp804_delay_timer.h> 809d40e0eSAntonio Nino Diaz #include <drivers/generic_delay_timer.h> 909d40e0eSAntonio Nino Diaz #include <lib/mmio.h> 1009d40e0eSAntonio Nino Diaz #include <plat/common/platform.h> 11*234bc7f8SAntonio Nino Diaz #include <platform_def.h> 1209d40e0eSAntonio Nino Diaz 133fc4124cSDan Handley #include <plat_arm.h> 143fc4124cSDan Handley #include "fvp_private.h" 153fc4124cSDan Handley 160c306cc0SSoby Mathew void bl2_early_platform_setup2(u_register_t arg0, u_register_t arg1, u_register_t arg2, u_register_t arg3) 173fc4124cSDan Handley { 18cab0b5b0SSoby Mathew arm_bl2_early_platform_setup((uintptr_t)arg0, (meminfo_t *)arg1); 193fc4124cSDan Handley 203fc4124cSDan Handley /* Initialize the platform config for future decision making */ 213fc4124cSDan Handley fvp_config_setup(); 223fc4124cSDan Handley } 23b49b3221SRyan Harkin 24b49b3221SRyan Harkin void bl2_platform_setup(void) 25b49b3221SRyan Harkin { 26b49b3221SRyan Harkin arm_bl2_platform_setup(); 27b49b3221SRyan Harkin 2832cd95f0SAntonio Nino Diaz #if FVP_USE_SP804_TIMER 29540a5ba8SJuan Castillo /* Enable the clock override for SP804 timer 0, which means that no 30540a5ba8SJuan Castillo * clock dividers are applied and the raw (35 MHz) clock will be used */ 31540a5ba8SJuan Castillo mmio_write_32(V2M_SP810_BASE, FVP_SP810_CTRL_TIM0_OV); 32540a5ba8SJuan Castillo 33b49b3221SRyan Harkin /* Initialize delay timer driver using SP804 dual timer 0 */ 34b49b3221SRyan Harkin sp804_timer_init(V2M_SP804_TIMER0_BASE, 35b49b3221SRyan Harkin SP804_TIMER_CLKMULT, SP804_TIMER_CLKDIV); 3632cd95f0SAntonio Nino Diaz #else 3732cd95f0SAntonio Nino Diaz generic_delay_timer_init(); 3832cd95f0SAntonio Nino Diaz #endif /* FVP_USE_SP804_TIMER */ 39b49b3221SRyan Harkin } 40