181528dbcSRoberto Vargas /* 281528dbcSRoberto Vargas * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. 381528dbcSRoberto Vargas * 481528dbcSRoberto Vargas * SPDX-License-Identifier: BSD-3-Clause 581528dbcSRoberto Vargas */ 681528dbcSRoberto Vargas 7*bd9344f6SAntonio Nino Diaz #include <plat/arm/common/plat_arm.h> 8*bd9344f6SAntonio Nino Diaz 981528dbcSRoberto Vargas #include "fvp_private.h" 1081528dbcSRoberto Vargas bl2_el3_early_platform_setup(u_register_t arg0 __unused,u_register_t arg1 __unused,u_register_t arg2 __unused,u_register_t arg3 __unused)1181528dbcSRoberto Vargasvoid bl2_el3_early_platform_setup(u_register_t arg0 __unused, 1281528dbcSRoberto Vargas u_register_t arg1 __unused, 1381528dbcSRoberto Vargas u_register_t arg2 __unused, 1481528dbcSRoberto Vargas u_register_t arg3 __unused) 1581528dbcSRoberto Vargas { 1681528dbcSRoberto Vargas arm_bl2_el3_early_platform_setup(); 1781528dbcSRoberto Vargas 1881528dbcSRoberto Vargas /* Initialize the platform config for future decision making */ 1981528dbcSRoberto Vargas fvp_config_setup(); 2081528dbcSRoberto Vargas 2181528dbcSRoberto Vargas /* 2281528dbcSRoberto Vargas * Initialize Interconnect for this cluster during cold boot. 2381528dbcSRoberto Vargas * No need for locks as no other CPU is active. 2481528dbcSRoberto Vargas */ 2581528dbcSRoberto Vargas fvp_interconnect_init(); 2681528dbcSRoberto Vargas /* 2781528dbcSRoberto Vargas * Enable coherency in Interconnect for the primary CPU's cluster. 2881528dbcSRoberto Vargas */ 2981528dbcSRoberto Vargas fvp_interconnect_enable(); 3081528dbcSRoberto Vargas } 31