1 /* 2 * Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <common/tbbr/tbbr_img_def.h> 8 #include <drivers/arm/smmu_v3.h> 9 #include <drivers/arm/sp805.h> 10 #include <plat/arm/common/arm_config.h> 11 #include <plat/arm/common/plat_arm.h> 12 #include <plat/arm/common/arm_def.h> 13 #include <plat/common/platform.h> 14 #include "fvp_private.h" 15 16 /******************************************************************************* 17 * Perform any BL1 specific platform actions. 18 ******************************************************************************/ 19 void bl1_early_platform_setup(void) 20 { 21 arm_bl1_early_platform_setup(); 22 23 /* Initialize the platform config for future decision making */ 24 fvp_config_setup(); 25 26 /* 27 * Initialize Interconnect for this cluster during cold boot. 28 * No need for locks as no other CPU is active. 29 */ 30 fvp_interconnect_init(); 31 /* 32 * Enable coherency in Interconnect for the primary CPU's cluster. 33 */ 34 fvp_interconnect_enable(); 35 } 36 37 void plat_arm_secure_wdt_start(void) 38 { 39 sp805_start(ARM_SP805_TWDG_BASE, ARM_TWDG_LOAD_VAL); 40 } 41 42 void plat_arm_secure_wdt_stop(void) 43 { 44 sp805_stop(ARM_SP805_TWDG_BASE); 45 } 46 47 void bl1_platform_setup(void) 48 { 49 arm_bl1_platform_setup(); 50 51 /* On FVP RevC, initialize SMMUv3 */ 52 if ((arm_config.flags & ARM_CONFIG_FVP_HAS_SMMUV3) != 0U) 53 smmuv3_security_init(PLAT_FVP_SMMUV3_BASE); 54 } 55