1 /* 2 * Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 9 #include <bl1/bl1.h> 10 #include <common/tbbr/tbbr_img_def.h> 11 #include <drivers/arm/smmu_v3.h> 12 #include <drivers/arm/sp805.h> 13 #include <plat/arm/common/arm_config.h> 14 #include <plat/arm/common/plat_arm.h> 15 #include <plat/arm/common/arm_def.h> 16 #include <plat/common/platform.h> 17 #include "fvp_private.h" 18 19 /******************************************************************************* 20 * Perform any BL1 specific platform actions. 21 ******************************************************************************/ 22 void bl1_early_platform_setup(void) 23 { 24 arm_bl1_early_platform_setup(); 25 26 /* Initialize the platform config for future decision making */ 27 fvp_config_setup(); 28 29 /* 30 * Initialize Interconnect for this cluster during cold boot. 31 * No need for locks as no other CPU is active. 32 */ 33 fvp_interconnect_init(); 34 /* 35 * Enable coherency in Interconnect for the primary CPU's cluster. 36 */ 37 fvp_interconnect_enable(); 38 } 39 40 void plat_arm_secure_wdt_start(void) 41 { 42 sp805_start(ARM_SP805_TWDG_BASE, ARM_TWDG_LOAD_VAL); 43 } 44 45 void plat_arm_secure_wdt_stop(void) 46 { 47 sp805_stop(ARM_SP805_TWDG_BASE); 48 } 49 50 void bl1_platform_setup(void) 51 { 52 arm_bl1_platform_setup(); 53 54 /* Initialize System level generic or SP804 timer */ 55 fvp_timer_init(); 56 57 /* On FVP RevC, initialize SMMUv3 */ 58 if ((arm_config.flags & ARM_CONFIG_FVP_HAS_SMMUV3) != 0U) 59 smmuv3_security_init(PLAT_FVP_SMMUV3_BASE); 60 } 61 62 __dead2 void bl1_plat_fwu_done(void *client_cookie, void *reserved) 63 { 64 /* Setup the watchdog to reset the system as soon as possible */ 65 sp805_refresh(ARM_SP805_TWDG_BASE, 1U); 66 67 while (1) 68 wfi(); 69 } 70 71 #if MEASURED_BOOT 72 /* 73 * Implementation for bl1_plat_handle_post_image_load(). This function 74 * populates the default arguments to BL2. The BL2 memory layout structure 75 * is allocated and the calculated layout is populated in arg1 to BL2. 76 */ 77 int bl1_plat_handle_post_image_load(unsigned int image_id) 78 { 79 meminfo_t *bl2_tzram_layout; 80 meminfo_t *bl1_tzram_layout; 81 image_desc_t *image_desc; 82 entry_point_info_t *ep_info; 83 84 if (image_id != BL2_IMAGE_ID) { 85 return 0; 86 } 87 88 /* Get the image descriptor */ 89 image_desc = bl1_plat_get_image_desc(BL2_IMAGE_ID); 90 assert(image_desc != NULL); 91 92 /* Calculate BL2 hash and set it in TB_FW_CONFIG */ 93 arm_bl1_set_bl2_hash(image_desc); 94 95 /* Get the entry point info */ 96 ep_info = &image_desc->ep_info; 97 98 /* Find out how much free trusted ram remains after BL1 load */ 99 bl1_tzram_layout = bl1_plat_sec_mem_layout(); 100 101 /* 102 * Create a new layout of memory for BL2 as seen by BL1 i.e. 103 * tell it the amount of total and free memory available. 104 * This layout is created at the first free address visible 105 * to BL2. BL2 will read the memory layout before using its 106 * memory for other purposes. 107 */ 108 bl2_tzram_layout = (meminfo_t *)bl1_tzram_layout->total_base; 109 110 bl1_calc_bl2_mem_layout(bl1_tzram_layout, bl2_tzram_layout); 111 112 ep_info->args.arg1 = (uintptr_t)bl2_tzram_layout; 113 114 VERBOSE("BL1: BL2 memory layout address = %p\n", 115 (void *)bl2_tzram_layout); 116 return 0; 117 } 118 #endif /* MEASURED_BOOT */ 119