1/* 2 * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7/dts-v1/; 8 9/ { 10 /* Platform Config */ 11 plat_arm_bl2 { 12 compatible = "arm,tb_fw"; 13 hw_config_addr = <0x0 0x82000000>; 14 hw_config_max_size = <0x01000000>; 15 /* Disable authentication for development */ 16 disable_auth = <0x0>; 17 /* 18 * Load SoC and TOS firmware configs at the base of 19 * non shared SRAM. The runtime checks ensure we don't 20 * overlap BL2, BL31 or BL32. The NT firmware config 21 * is loaded at base of DRAM. 22 */ 23 soc_fw_config_addr = <0x0 0x04001000>; 24 soc_fw_config_max_size = <0x200>; 25 tos_fw_config_addr = <0x0 0x04001200>; 26 tos_fw_config_max_size = <0x200>; 27 nt_fw_config_addr = <0x0 0x80000000>; 28 nt_fw_config_max_size = <0x200>; 29 /* 30 * The following two entries are placeholders for Mbed TLS 31 * heap information. The default values don't matter since 32 * they will be overwritten by BL1. 33 * In case of having shared Mbed TLS heap between BL1 and BL2, 34 * BL1 will populate these two properties with the respective 35 * info about the shared heap. This info will be available for 36 * BL2 in order to locate and re-use the heap. 37 */ 38 mbedtls_heap_addr = <0x0 0x0>; 39 mbedtls_heap_size = <0x0>; 40 }; 41}; 42